2
USING THE EVALUATION BOARD
1) Powering Up the SP6682 Circuit
The SP6682 Evaluation Board can be
powered from inputs from a +2.7V to +5.5V
battery or a power supply. Connect with
short leads directly to the “Vin” and “GND”
posts. Monitor the Output Voltage and
connect the Load between the “LEDA” post
and the “GND” post.
2) Using the Jumper and posts
There are two jumpers (J1 and J2) and
seven posts on the Eval Board. The output
of SP6682 was connected to the four 15mA
white LEDs by the two jumpers as default. If
the customer has his own white LED load
module, they can plug the two terminals of
their load to the “LEDA” and “LEDK” posts.
3) Selecting the Bias Resistor
The bias resistor could be estimated by (1)
LEDLED
FB
B
I
3.0
I
V
R ==
(1)
Where I
LED
is the operating current of the
white LEDs.
4) Selecting of V
mode
and Divider Resistor
SP6682 can automatically change from X1.5
mode to X2 mode for highest efficiency. To
use this feature, divider resistors should be
chosen according to the specific application.
The guideline for divider resistor selections
is as follows.
For high input voltage, the SP6682 will work
in X1.5 mode, when the input voltage drops
to V
mode
threshold voltage, it will switch to X2
mode automatically.
The V
mode
threshold voltage could be
calculated by (2)
5.1
RIm3.0V
V
outLEDF
th
⋅⋅++
=
(2)
Where V
F
and m are the forward voltage
and number of the white LEDs, R
out
is the
output resistance of the SP6682.
To keep performance constant with different
V
mode
and to reduce divider current, fix R
2
as
100Kohm, the R
1
could be selected by (3)
)
875.1
R875.1RIm3.0V
R
2outLEDF
1
−⋅
= (3)
For detailed derivation of the above
equations, please refer to the data sheet.
Selecting of bias resistor, divider resistor
and efficiency estimation could be done
Using the SP6682 CAD file provided by
Sipex.
5) Selecting of Capacitors
Ceramic capacitors are used on the eval
board due to their inherently low ESR, which
will help produce low peak to peak output
ripple, and reduce high frequency spikes.
Selection of the fly capacitor is a trade-off
between the output voltage ripple and the
output current capability. Decreasing the fly
capacitor will reduce the output voltage
ripple because less charge will be delivered
to the output capacitor. However, smaller fly
capacitor leads to larger output resistance,
thus decrease the output current capability
and the circuit efficiency.
In the eval board, the input, output and fly
capacitors are selected as 2.2uF ceramic
capacitors. Input and output ripple could be
further reduced by using larger low ESR
input and output capacitor.
6) Brightness Control
Obvious dimming control could be achieved
by applying a PWM control signal to the
ENABLE/PWM pin. The PWM signal should
have a repetition rate of at least 60Hz to
prevent flicker but should not exceed 200Hz
to allow the capacitors to discharge.
Please note that it is important to make the
PWM voltage be V
in
or GND voltages
