TLP2110
4
8.
8.
8.
8. Recommended Operating Conditions (Note)
Recommended Operating Conditions (Note)
Recommended Operating Conditions (Note)
Recommended Operating Conditions (Note)
Characteristics
Input on-state current
Input off-state voltage
Supply voltage
Operating temperature
Symbol
I
F(ON)
V
F(OFF)
V
DD
T
opr
Note
(Note 1),
(Note 2)
(Note 1),
(Note 2)
(Note 3)
(Note 3)
Min
2
0
2.7
-40
Typ.
3.3 / 5
Max
6
0.8
5.5
125
Unit
mA
V
V
Note: The recommended operating conditions are given as a design guide necessary to obtain the intended
performance of the device. Each parameter is an independent value. When creating a system design using
this device, the electrical characteristics specified in this data sheet should also be considered.
Note: A ceramic capacitor (0.1 µF) should be connected between pin 8 and pin 5 to stabilize the operation of a high-
gain linear amplifier. Otherwise, this photocoupler may not switch properly. The bypass capacitor should be
placed within 1 cm of each pin.
Note 1: Each channel
Note 2: The rise and fall times of the input on-current should be less than 0.5 µs.
Note 3: Denotes the operating range, not the recommended operating condition.
9.
9.
9.
9. Electrical Characteristics (Note)
Electrical Characteristics (Note)
Electrical Characteristics (Note)
Electrical Characteristics (Note)
(Unless otherwise specified, T
(Unless otherwise specified, T
(Unless otherwise specified, T
(Unless otherwise specified, T
a
a
a
a
= -40 to 125
= -40 to 125
= -40 to 125
= -40 to 125
, V
, V
, V
, V
DD
DD
DD
DD
= 2.7 to 5.5 V)
= 2.7 to 5.5 V)
= 2.7 to 5.5 V)
= 2.7 to 5.5 V)
Characteristics
Input forward voltage
Input forward voltage
temperature coefficient
Input reverse current
Input capacitance
Low-level output voltage
High-level output voltage
Low-level supply current
High-level supply current
Threshold input current (L/H)
Symbol
V
F
V
F
/T
a
I
R
C
t
V
OL
V
OH
I
DDL
I
DDH
I
FLH
Note
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
Test
Circuit
Fig.
12.1.1
Fig.
12.1.2
Fig.
12.1.3
Fig.
12.1.4
Test Condition
I
F
= 2 mA
I
F
= 2 mA, T
a
= 25
I
F
= 2 mA
V
R
= 5 V, T
a
= 25
V = 0 V, f = 1 MHz , T
a
= 25
I
O
= 20 µA, V
F
= 0.8 V
I
O
= 3.2 mA, V
F
= 0.8 V
I
O
= -20 µA, I
F
= 2 mA
I
O
= -3.2 mA, I
F
= 2 mA
I
F
= 0 mA
I
F
= 2 mA
I
O
= -3.2 mA, V
O
> V
DD
- 1 V
Min
1.2
1.4
V
DD
-
0.1
V
DD
-
1.0
Typ.
1.53
-1.58
20
V
DD
-
0.01
V
DD
-
0.25
Max
1.9
1.7
10
0.1
0.4
0.6
0.6
1.0
Unit
V
mV/
µA
pF
V
mA
Note: All typical values are at V
DD
= 5 V, T
a
= 25 , unless otherwise noted.
Note 1: Each channel
10.
10.
10.
10. Isolation Characteristics
Isolation Characteristics
Isolation Characteristics
Isolation Characteristics
(Unless otherwise specified, T
(Unless otherwise specified, T
(Unless otherwise specified, T
(Unless otherwise specified, T
a
a
a
a
= 25
= 25
= 25
= 25
)
)
)
)
Characteristics
Total capacitance (input to
output)
Isolation resistance
Isolation voltage
Symbol
C
S
R
S
BV
S
Note
(Note 1)
(Note 1)
(Note 1)
Test Condition
V
S
= 0 V, f = 1 MHz
V
S
= 500 V, R.H. 60 %
AC, 60 s
AC, 1 s in oil
DC, 60 s in oil
Min
10
12
2500
Typ.
0.8
10
14
5000
5000
Max
Unit
pF
Vrms
Vdc
Note 1: This device is considered as a two-terminal device: Pins 1, 2, 3 and 4 are shorted together, and pins 5, 6, 7
and 8 are shorted together.
2017-07-31
Rev.5.0
©2016-2017
Toshiba Electronic Devices & Storage Corporation
TLP2110
5
11.
11.
11.
11. Switching Characteristics (Note)
Switching Characteristics (Note)
Switching Characteristics (Note)
Switching Characteristics (Note)
(Unless otherwise specified, T
(Unless otherwise specified, T
(Unless otherwise specified, T
(Unless otherwise specified, T
a
a
a
a
= -40 to 125
= -40 to 125
= -40 to 125
= -40 to 125
, V
, V
, V
, V
DD
DD
DD
DD
= 2.7 to 5.5 V)
= 2.7 to 5.5 V)
= 2.7 to 5.5 V)
= 2.7 to 5.5 V)
Characteristics
Propagation delay time
(L/H)
Propagation delay time
(H/L)
Pulse width distortion
Propagation delay skew
(device to device)
Propagation delay time
(L/H)
Propagation delay time
(H/L)
Pulse width distortion
Propagation delay skew
(device to device)
Propagation delay time
(L/H)
Propagation delay time
(H/L)
Pulse width distortion
Propagation delay skew
(device to device)
Rise time
Fall time
Common-mode transient
immunity at output high
Common-mode transient
immunity at output low
Symbol
t
pLH
t
pHL
|t
pHL
-t
pLH
|
t
psk
t
pLH
t
pHL
|t
pHL
-t
pLH
|
t
psk
t
pLH
t
pHL
|t
pHL
-t
pLH
|
t
psk
t
r
t
f
CM
H
CM
L
Note
(Note 1)
(Note 1),
(Note 2)
(Note 1)
(Note 1),
(Note 2)
(Note 1)
(Note 1),
(Note 2)
(Note 1)
Test
Circuit
Fig.
12.1.5
Fig.
12.1.6
Fig.
12.1.5
Fig.
12.1.7
Test Condition
V
IN
= 3.3 V, R
T
= 820
V
IN
= 5 V, R
T
= 1.6 k
I
F
= 2 mA, R = 100
V
IN
= 0 3.3 V, R
T
= 820 ,
V
DD
= 5 V
V
IN
= 3.3 0 V, R
T
= 820 ,
V
DD
= 5 V
V
IN
= 3.3 V / 5 V,
R
T
= 820 / 1.6 k,
V
CM
= 1000 V
p-p
, T
a
= 25
Min
80
60
-65
80
60
-65
80
60
-65
±25
Typ.
11
13
±40
Max
250
250
50
65
250
250
50
65
250
250
30
65
Unit
ns
kV/µs
Note: All typical values are at V
DD
= 5 V, T
a
= 25 , unless otherwise noted.
Note: Each channel
Note: Recommendation input resistance conditions
V
IN
= 3.3 V : R
1
= R
2
= 430
V
IN
= 5 V : R
1
= R
2
= 820
Note 1: f = 250 kHz, duty = 50 %, input current t
r
= t
f
= 5 ns, C
L
is approximately 15 pF which includes probe and stray
wiring capacitance.
Note 2: The propagation delay skew, t
psk
, is equal to the magnitude of the worst-case difference in t
pHL
and/or t
pLH
that will be seen between units at the same given conditions (supply voltage, input current, temperature, etc).
2017-07-31
Rev.5.0
©2016-2017
Toshiba Electronic Devices & Storage Corporation
TLP2110
6
12.
12.
12.
12. Test Circuits
Test Circuits
Test Circuits
Test Circuits
12.1.
12.1.
12.1.
12.1. Test Circuits
Test Circuits
Test Circuits
Test Circuits
Fig.
Fig.
Fig.
Fig. 12.1.1
12.1.1
12.1.1
12.1.1 V
V
V
V
OL
OL
OL
OL
Test Circuit
Test Circuit
Test Circuit
Test Circuit Fig.
Fig.
Fig.
Fig. 12.1.2
12.1.2
12.1.2
12.1.2 V
V
V
V
OH
OH
OH
OH
Test Circuit
Test Circuit
Test Circuit
Test Circuit
Fig.
Fig.
Fig.
Fig. 12.1.3
12.1.3
12.1.3
12.1.3 I
I
I
I
DDL
DDL
DDL
DDL
Test Circuit
Test Circuit
Test Circuit
Test Circuit Fig.
Fig.
Fig.
Fig. 12.1.4
12.1.4
12.1.4
12.1.4 I
I
I
I
DDH
DDH
DDH
DDH
Test Circuit
Test Circuit
Test Circuit
Test Circuit
Fig.
Fig.
Fig.
Fig. 12.1.5
12.1.5
12.1.5
12.1.5 Switching Time Test Circuit and Waveform
Switching Time Test Circuit and Waveform
Switching Time Test Circuit and Waveform
Switching Time Test Circuit and Waveform
Fig.
Fig.
Fig.
Fig. 12.1.6
12.1.6
12.1.6
12.1.6 Switching Time Test Circuit and Waveform
Switching Time Test Circuit and Waveform
Switching Time Test Circuit and Waveform
Switching Time Test Circuit and Waveform
2017-07-31
Rev.5.0
©2016-2017
Toshiba Electronic Devices & Storage Corporation

TLP2110(TP,F)

Mfr. #:
Manufacturer:
Toshiba
Description:
High Speed Optocouplers Photo-IC 5Mbps I-Temp
Lifecycle:
New from this manufacturer.
Delivery:
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Payment:
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