© Semiconductor Components Industries, LLC, 2013
May, 2018 Rev. 16
1 Publication Order Number:
CAT24C128/D
CAT24C128
EEPROM Serial 128-Kb I
2
C
Description
The CAT24C128 is a EEPROM Serial 128Kb I
2
C internally
organized as 16,384 words of 8 bits each.
It features a 64byte page write buffer and supports both the
Standard (100 kHz), Fast (400 kHz) and FastPlus (1 MHz) I
2
C
protocol.
Write operations can be inhibited by taking the WP pin High (this
protects the entire memory).
OnChip ECC (Error Correction Code) makes the device suitable
for high reliability applications.*
Features
Supports Standard, Fast and FastPlus I
2
C Protocol
1.8 V to 5.5 V Supply Voltage Range
64Byte Page Write Buffer
Hardware Write Protection for Entire Memory
Schmitt Triggers and Noise Suppression Filters on I
2
C Bus Inputs
(SCL and SDA)
Low Power CMOS Technology
1,000,000 Program/Erase Cycles
100 Year Data Retention
Industrial and Extended Temperature Range
This Device is PbFree, Halogen Free/BFR Free and RoHS
Compliant**
Figure 1. Functional Symbol
SDA
SCL
WP
CAT24C128
V
CC
V
SS
A
2
, A
1
, A
0
** For additional information on our PbFree strategy and soldering details,
please download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
www.onsemi.com
PIN CONFIGURATION
SDA
WP
V
CC
V
SS
A
2
A
1
A
0
1
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
ORDERING INFORMATION
SOIC8
W SUFFIX
CASE 751BD
SCL
SOIC (W), TSSOP (Y), UDFN (HU4)
TSSOP8
Y SUFFIX
CASE 948AL
Device Address InputsA
0
, A
1
, A
2
Serial Data Input/OutputSDA
Serial Clock InputSCL
Write Protect InputWP
Power SupplyV
CC
GroundV
SS
FunctionPin Name
PIN FUNCTION
For the location of Pin 1, please consult the
corresponding package drawing.
UDFN8
HU4 SUFFIX
CASE 517AZ
The exposed pad for the TDFN/UDFN packages can
be left floating or connected to Ground.
SOIC8 WIDE
X SUFFIX
CASE 751BE
CAT24C128
www.onsemi.com
2
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter Rating Units
Storage Temperature 65 to +150 °C
Voltage on Any Pin with Respect to Ground (Note 1) 0.5 to +6.5 V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. The DC input voltage on any pin should not be lower than 0.5 V or higher than V
CC
+ 0.5 V. During transitions, the voltage on any pin may
undershoot to no less than 1.5 V or overshoot to no more than V
CC
+ 1.5 V, for periods of less than 20 ns.
Table 2. RELIABILITY CHARACTERISTICS (Note 2)
Symbol Parameter Min Units
N
END
(Notes 3, 4) Endurance 1,000,000 Program / Erase Cycles
T
DR
Data Retention 100 Years
2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AECQ100
and JEDEC test methods.
3. Page Mode, V
CC
= 5 V, 25°C
4. The new product revision (C) uses ECC (Error Correction Code) logic with 6 ECC bits to correct one bit error in 4 data bytes. Therefore, when
a single byte has to be written, 4 bytes (including the ECC bits) are reprogrammed. It is recommended to write by multiple of 4 bytes in order
to benefit from the maximum number of write cycles.
Table 3. D.C. OPERATING CHARACTERISTICS Mature Product (Rev B)
(V
CC
= 1.8 V to 5.5 V, T
A
= 40°C to +125°C, unless otherwise specified.)
Symbol
Parameter Test Conditions Min Max Units
I
CCR
Read Current Read, f
SCL
= 400 kHz 1 mA
I
CCW
Write Current Write, f
SCL
= 400 kHz 3 mA
I
SB
Standby Current All I/O Pins at GND or V
CC
T
A
= 40°C to +85°C 1 mA
T
A
= 40°C to +125°C 2
I
L
I/O Pin Leakage Pin at GND or V
CC
T
A
= 40°C to +85°C 1 mA
T
A
= 40°C to +125°C 2
V
IL
Input Low Voltage 0.5 V
CC
x 0.3 V
V
IH
Input High Voltage V
CC
x 0.7 V
CC
+ 0.5 V
V
OL1
Output Low Voltage V
CC
2.5 V, I
OL
= 3.0 mA 0.4 V
V
OL2
Output Low Voltage V
CC
< 2.5 V, I
OL
= 1.0 mA 0.2 V
Table 4. PIN IMPEDANCE CHARACTERISTICS Mature Product (Rev B)
(V
CC
= 1.8 V to 5.5 V, T
A
= 40°C to +125°C, unless otherwise specified.)
Symbol
Parameter Conditions Max Units
C
IN
(Note 5) SDA I/O Pin Capacitance V
IN
= 0 V 8 pF
C
IN
(Note 5) Input Capacitance (other pins) V
IN
= 0 V 6 pF
I
WP
(Note 6) WP Input Current
V
IN
< V
IH
200
mA
V
IN
> V
IH
1
mA
5. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AECQ100
and JEDEC test methods.
6. When not driven, the WP pin is pulled down to GND internally. For improved noise immunity, the internal pulldown is relatively strong;
therefore the external driver must be able to supply the pulldown current when attempting to drive the input HIGH. To conserve power, as
the input level exceeds the trip point of the CMOS input buffer (~ 0.5 x V
CC
), the strong pulldown reverts to a weak current source.
CAT24C128
www.onsemi.com
3
Table 5. D.C. OPERATING CHARACTERISTICS New Product (Rev C) (Note 7)
(V
CC
= 1.8 V to 5.5 V, T
A
= 40°C to +85°C and V
CC
= 2.5 V to 5.5 V, T
A
= 40°C to +125°C, unless otherwise specied.)
Symbol
Parameter Test Conditions Min Max Units
I
CCR
Read Current Read, f
SCL
= 400 kHz/1 MHz 1 mA
I
CCW
Write Current 3 mA
I
SB
Standby Current All I/O Pins at GND or V
CC
T
A
= 40°C to +85°C 2 mA
T
A
= 40°C to +125°C 5
I
L
I/O Pin Leakage Pin at GND or V
CC
T
A
= 40°C to +85°C 1 mA
T
A
= 40°C to +125°C 2
V
IL1
Input Low Voltage 2.5 V V
CC
5.5 V 0.5 0.3 V
CC
V
V
IL2
Input Low Voltage 1.8 V V
CC
< 2.5 V 0.5 0.25 V
CC
V
V
IH1
Input High Voltage 2.5 V V
CC
5.5 V 0.7 V
CC
V
CC
+ 0.5 V
V
IH2
Input High Voltage 1.8 V V
CC
< 2.5 V 0.75 V
CC
V
CC
+ 0.5 V
V
OL1
Output Low Voltage V
CC
2.5 V, I
OL
= 3.0 mA 0.4 V
V
OL2
Output Low Voltage V
CC
< 2.5 V, I
OL
= 1.0 mA 0.2 V
Table 6. PIN IMPEDANCE CHARACTERISTICS New Product (Rev C) (Note 7)
(V
CC
= 1.8 V to 5.5 V, T
A
= 40°C to +85°C and V
CC
= 2.5 V to 5.5 V, T
A
= 40°C to +125°C, unless otherwise specied.)
Symbol
Parameter Conditions Max Units
C
IN
(Note 8) SDA I/O Pin Capacitance V
IN
= 0 V 8 pF
C
IN
(Note 8) Input Capacitance (other pins) V
IN
= 0 V 6 pF
I
WP
, I
A
(Note 9) WP Input Current, Address Input
Current (A
0
, A
1
, A
2
)
V
IN
< V
IH
, V
CC
= 5.5 V 75 mA
V
IN
< V
IH
, V
CC
= 3.3 V 50
V
IN
< V
IH
, V
CC
= 1.8 V 25
V
IN
> V
IH
2
7. The product Rev C is identified by letter “C” or dedicated marking code on top of the package.
8. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AECQ100
and JEDEC test methods.
9. When not driven, the WP, A
0
, A
1
, A
2
pins are pulled down to GND internally. For improved noise immunity, the internal pulldown is relatively
strong; therefore the external driver must be able to supply the pulldown current when attempting to drive the input HIGH. To conserve power,
as the input level exceeds the trip point of the CMOS input buffer (~ 0.5 x V
CC
), the strong pulldown reverts to a weak current source.

CAT24C128WI-GT3

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
EEPROM 128K-Bit I2C Serial CMOS EEPROM
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union