MP2671DL-LF-P

MP2671 – CHARGE SYSTEM PROTECTION CIRCUIT
MP2671 Rev. 0.9 www.MonolithicPower.com 7
2/23/2009 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2009 MPS. All Rights Reserved.
BLOCK DIAGRAM
CP1
1.2V
0.8V
R2
R1
INPUT
V
IN
Q4
R
Q1
Q2
Q3 ILIM
VB
R
VB
OUT
R
ILIM
Q5
WRN
GND
--
+
CP3
--
+
CP2
--
+
EA
--
+
LOGIC
FET
DRIVER
POR
PRE-REG
REF
LINEAR
BATTERY
CHARGER
+
EN
Figure 1—Functional Block Diagram
MP2671 – CHARGE SYSTEM PROTECTION CIRCUIT
MP2671 Rev. 0.9 www.MonolithicPower.com 8
2/23/2009 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2009 MPS. All Rights Reserved.
OPERATION
The MP2671 is designed to provide a
redundant safety protection to a Li-Ion battery
from failures of the charging system. The IC
continuously monitors the input voltage, the
battery voltage, and the charge current. When
any of the above three parameters exceeds its
limit, the IC turns off an internal N-channel
MOSFET to remove the power from the
charging system. The threshold of charge
current protection is user-programmable.
Additionally, the IC also monitors its own die
temperature and turns off the N-channel
MOSFET if the temperature exceeds 140°C.
Together with the battery charging IC and the
protection module in a battery pack, the
charging system has triple-level protection from
over-charging the Li-Ion battery and is two–fault
tolerant. The MP2671 protects up to 30V input
voltage.
Power Up
The MP2671 has a power-on reset (POR)
threshold of 2.6V with a built-in hysteresis of
110mV. When the input voltage is below the
POR threshold, the internal power FET is off.
The IC resets itself and waits for approximately
10ms after the input voltage exceeds the POR
threshold, then, if the input voltage and battery
voltage are safe, the IC begins to soft-start the
internal power FET. The 10ms delay allows any
transient at the input during a hot insertion of
the power supply to settle down before the IC
stars to operate. The soft-start slowly turns on
the power FET to reduce the inrush current as
well as the input voltage drop during the
transition.
Input Over-voltage Protection (OVP)
The input voltage is continuously monitored by
the comparator CP1 in the Block Diagram
(Figure 1). The OVP threshold is set by a
resistive divider consisting of R1 and R2 and an
accurate reference generated by the IC itself.
The protection threshold is set to 5.8V. When
the input voltage exceeds the threshold, the
CP1 outputs a logic signal to turn off the power
FET within 1µs to prevent the high input voltage
from damaging the electronics in the handheld
system. The hysteresis for the input OVP
threshold is given in the Electrical Specification.
When the input over-voltage condition is
removed, the power FET is turned on again by
running through the soft-start. Because of the
10ms second delay before the soft-start, the
output is never enabled if the input rises above
the OVP threshold quickly.
Over-current Protection (OCP)
The current in the power FET is limited to
prevent charging the battery with an excessive
current. The current is sensed using the voltage
drop across the power FET after the FET is
turned on. The reference of the OCP is
generated using a sensing FET Q2, as shown
in Figure 1. The current in the sensing FET is
forced to a value which can be programmed by
an external resistor connected to the ILIM pin.
The size of the power FET Q1 is 31,250 times
the size of the sensing FET Q2. Therefore,
when the current in the power FET is 31,250
times the current in the sensing FET, the drain
voltage of the power FET falls below that of the
sensing FET. The comparator CP2 then outputs
a signal to turn off the power FET. The OCP
threshold can be programmed using the
following formula:
ILIMILIM
LIM
RR
V
I
25000
31250
8.0
==
The OCP comparator CP2 has a built-in 170µs
delay to prevent false triggering by transient
signals. When OCP happened, Vo shuts down
for about 40ms and take 10ms delay to soft
start as the OCP condition is removed. The
OCP function also has a 4-bit binary counter
that accumulates during an OCP event. When
the total count reaches 16, the power PFET is
turned off permanently unless the input power
is recycled or the enable pin is toggled.
MP2671 – CHARGE SYSTEM PROTECTION CIRCUIT
MP2671 Rev. 0.9 www.MonolithicPower.com 9
2/23/2009 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2009 MPS. All Rights Reserved.
Battery Over-voltage Protection (BOVP)
The battery voltage OVP threshold is internally
set to 4.34V. The threshold has 30mV built-in
hysteresis. The comparator CP3, as shown in
Figure 1, monitors the VB pin and issues an
over-voltage signal to turn off the internal power
FET when the battery voltage exceeds the
battery OVP threshold. The comparator CP3
has a built-in 180µs blanking time to prevent
any transient voltage from triggering the OVP. If
the OVP situation still exists after the blanking
time, the power FET is turned off. There is an
internal 4-bit binary counter monitoring the
occurrences of the battery over-voltage event. If
the battery over-voltage occurs 16 times, the
power FET is turned off permanently. Recycling
the input power or toggling the enable (
EN )
input will reset the counter and restart the
MP2671.
The resistor between the VB pin and the
battery, R
VB
, as shown in the Typical
Applications circuit, is an important component.
This resistor provides a current limit in case the
VB pin is shorted to the input voltage under a
failure mode. The VB pin leakage current under
normal operation is negligible to allow a
resistance of 200k to 1M be used.
Thermal Protection
The MP2671 monitors its own die temperature
to prevent thermal failures. When the internal
temperature reaches 140°C, the internal N-
channel power MOSFET is turned off. The IC
does not resume operation until the internal
temperature drops below 90°C.
External Enable Function
The MP2671 offers an enable (
EN ) input which
can be used to enable or disable the IC. When
the
EN pin is pulled to logic HIGH, the
protection IC is shut down. The internal control
circuit as well as the power FET is turned off.
Both 4-bit binary counters for the battery OVP
and the OCP are reset to zero when the IC is
re-enabled. The
EN pin has an internal 200k
pull-down resistor. Leaving the
EN pin floating
or driving it to below 0.4V enables the IC.
Warning Indication Output
The
WRN pin is an open-drain output that
indicates a LOW signal when any of the three
protection events happens. To pull the
WRN
pin voltage low when fault, a 1k Ω resistor
should used as the pull up resistor.

MP2671DL-LF-P

Mfr. #:
Manufacturer:
Monolithic Power Systems (MPS)
Description:
Battery Management Li-ion Battery Charg Protection Circuit
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet