Dual/Quad,
Low Power, High Speed
JFET Operational Amplifiers
Data Sheet
OP282/OP482
Rev. I Document Feedback
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FEATURES
High slew rate: 9 V/µs
Wide bandwidth: 4 MHz
Low supply current: 250 µA/amplifier maximum
Low offset voltage: 3 mV maximum
Low bias current: 100 pA maximum
Fast settling time
Common-mode range includes V+
Unity-gain stable
14-ball wafer level chip scale for quad
APPLICATIONS
Active filters
Fast amplifiers
Integrators
Supply current monitoring
GENERAL DESCRIPTION
The OP282/OP482 dual and quad operational amplifiers feature
excellent speed at exceptionally low supply currents. The slew
rate is typically 9 V/µs with a supply current of less than 250 µA
per amplifier. These unity-gain stable amplifiers have a typical
gain bandwidth of 4 MHz.
The JFET input stage of the OP282/OP482 ensures that the bias
current is typically a few picoamps and is less than 500 pA over
the full temperature range. The offset voltage is less than 3 mV
for the dual amplifier and less than 4 mV for the quad amplifier.
With a wide output swing (within 1.5 V of each supply), low
power consumption, and high slew rate, the OP282/OP482 are
ideal for battery-powered systems or power-restricted applica-
tions. An input common-mode range that includes the positive
supply makes the OP282/OP482 an excellent choice for high-
side signal conditioning.
The OP282/OP482 are specified over the extended industrial
temperature range. The OP282 is available in the standard
8-lead, narrow SOIC and MSOP packages. The OP482 is
available in the PDIP and narrow SOIC packages, as well as
a 14-ball WLCSP.
PIN CONNECTIONS
1
2
3
4
5
6
7
8
OUT
A
–IN A
+IN A
V–
OP-482
V+
OUT B
–IN B
+IN B
OP282
00301-001
Figure 1. 8-Lead, Narrow-Body SOIC (S-Suffix) [R-8]
00301-002
OUT
A
1
–IN A
2
+IN A
3
V–
4
V+
8
OUT B
7
–IN B
6
+IN B
5
OP282
TOP VIEW
(Not to Scale)
Figure 2. 8-Lead MSOP [RM-8]
1
2
3
4
5
6
7
14
13
12
11
10
9
8
OUT A
–IN A
+IN A
V+
+IN B
–IN B
OUT B
OUT D
–IN D
+IN D
V–
+IN C
–IN C
OUT C
OP482
– +
+ –
– +
+ –
00301-003
Figure 3. 14-Lead PDIP (P-Suffix) [N-14]
1
2
3
4
5
6
7
14
13
12
1
1
10
9
8
OUT
A
–IN A
+IN A
V+
+IN B
–IN B
OUT B
OUT D
–IN D
+IN D
V–
+IN C
–IN C
OUT C
OP482
00301-004
Figure 4. 14-Lead, Narrow-Body SOIC (S-Suffix) [R-14]
TOP VIEW (BALL SIDE DOWN)
Not to Scale
00301-048
BALL A1 CORNER
OUT A
+IN D
V–
+IN C
OUT C
OUT D
–IN A
V+
–IN B
OUT B
–IN D
+IN A
+IN B
–IN C
A
B
C
D
E
F
1
2
3
G
H
J
Figure 5. 14-Ball WLCSP [CB-14-2]
OP282/OP482 Data Sheet
Rev. I | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Pin Connections ............................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Electrical Characteristics ............................................................. 3
Absolute Maximum Ratings ............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution...................................................................................4
Typical Performance Characteristics ..............................................5
Applications Information .............................................................. 12
High-Side Signal Conditioning ................................................ 12
Phase Inversion ........................................................................... 12
Active Filters ............................................................................... 12
Programmable State Variable Filter ......................................... 13
Outline Dimensions ....................................................................... 14
Ordering Guide .......................................................................... 16
REVISION HISTORY
9/13—Rev. H to Rev. I
Changes to Figure 5 .......................................................................... 1
Updated Outline Dimensions ....................................................... 14
Changes to Ordering Guide .......................................................... 16
9/10—Rev. G to Rev. H
Added WLCSP .................................................................... Universal
Changes to Features Section............................................................ 1
Changes to General Description Section ...................................... 1
Added Figure 5; Renumbered Sequentially .................................. 1
Changes to Large-Signal Voltage Gain Parameter, Table 1 ......... 3
Changes to Table 2, Thermal Resistance Section, and Table 3 ... 4
Change to Figure 30 ......................................................................... 9
Added Figure 53 .............................................................................. 16
Changes to Ordering Guide .......................................................... 16
7/08—Rev. F to Re v. G
Changes to Phase Inversion Section ............................................ 12
Deleted Figure 45 ............................................................................ 12
Added Figure 45 and Figure 46..................................................... 12
Updated Outline Dimensions ....................................................... 14
Changes to Ordering Guide .......................................................... 16
10/04—Rev. E to Rev. F
Deleted 8-Lead PDIP ......................................................... Universal
Added 8-Lead MSOP ......................................................... Universal
Changes to Format and Layout ......................................... Universal
Changes to Features .......................................................................... 1
Changes to Pin Configurations ....................................................... 1
Changes to General Description .................................................... 1
Changes to Specifications ................................................................ 3
Changes to Absolute Maximum Ratings ....................................... 4
Changes to Table 3 ............................................................................ 4
Added Figure 5 through Figure 20; Renumbered
Successive Figures .............................................................................. 5
Updated Figure 21 and Figure 22 .................................................... 7
Updated Figure 23 and Figure 27 .................................................... 8
Updated Figure 29 ............................................................................. 9
Updated Figure 35 and Figure 36 ................................................. 10
Updated Figure 43 .......................................................................... 11
Changes to Applications Information ......................................... 12
Changes to Figure 44 ...................................................................... 12
Deleted OP282/OP482 Spice Macro Model Section .................... 9
Deleted Figure 4 ................................................................................. 9
Deleted OP282 Spice Marco Model ............................................. 10
Updated Outline Dimensions ....................................................... 14
Changes to Ordering Guide .......................................................... 14
10/02—Rev. D to Re v. E
Edits to 8-Lead Epoxy DIP (P-Suffix) Pin ...................................... 1
Edits to Ordering Guide ................................................................... 3
Edits to Outline Dimensions ......................................................... 11
9/02—Rev. C to Rev. D
Edits to 14-Lead SOIC (S-Suffix) Pin ............................................. 1
Replaced 8-Lead SOIC (S-Suffix) ................................................. 11
4/02—Rev. B to Rev. C
Wafer Test Limits Deleted ................................................................ 2
Edits to Absolute Maximum Ratings .............................................. 3
Dice Characteristics Deleted ............................................................ 3
Edits to Ordering Guide ................................................................... 3
Edits to Figure 1 ................................................................................. 7
Edits to Figure 3 ................................................................................. 8
20-Position Chip Carrier (RC Suffix) Deleted ........................... 11
Data Sheet OP282/OP482
Rev. I | Page 3 of 16
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
At V
S
= ±15.0 V, T
A
= 25°C, unless otherwise noted; applies to both A and G grades.
Table 1.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage V
OS
OP282 0.2 3 mV
OP282, −40°C T
A
≤ +85°C 4.5 mV
OP482
0.2
4
mV
OP482, −40°C T
A
≤ +85°C 6 mV
Input Bias Current I
B
V
CM
= 0 V 3 100 pA
V
CM
= 0 V
1
500 pA
Input Offset Current I
OS
V
CM
= 0 V 1 50 pA
V
CM
= 0 V
1
250 pA
Input Voltage Range −11 +15 V
Common-Mode Rejection Ratio CMRR 11 V V
CM
+15 V, −40°C T
A
≤ +85°C 70 90 dB
Large-Signal Voltage Gain A
VO
R
L
= 10 kΩ, V
O
= ±13.5 V 20 V/mV
R
L
= 10 kΩ, −40°C T
A
≤ +85°C 15 V/mV
Offset Voltage Drift ΔV
OS
/ΔT 10 µV/°C
ΔI
B
/ΔT
8
pA/°C
OUTPUT CHARACTERISTICS
Output Voltage High V
OH
R
L
= 10 kΩ 13.5 13.9 V
Output Voltage Low V
OL
R
L
= 10 kΩ −13.9 −13.5 V
Short-Circuit Limit I
SC
Source 3 10 mA
Sink −12 −8 mA
Open-Loop Output Impedance Z
OUT
f = 1 MHz 200
POWER SUPPLY
Power Supply Rejection Ratio PSRR V
S
= ±4.5 V to ±18 V, −40°C T
A
≤ +85°C 25 316 µV/V
Supply Current/Amplifier I
SY
V
O
= 0 V, −40°C T
A
85°C 210 250 µA
Supply Voltage Range V
S
±4.5 ±18 V
DYNAMIC PERFORMANCE
Slew Rate SR R
L
= 10 kΩ 7 9 V/µs
Full-Power Bandwidth BW
P
1% distortion 125 kHz
t
S
To 0.01%
1.6
µs
Gain Bandwidth Product GBP 4 MHz
Phase Margin Ø
M
55 Degrees
Voltage Noise e
n
p-p 0.1 Hz to 10 Hz 1.3 µV p-p
Voltage Noise Density e
n
f = 1 kHz 36 nV/√Hz
Current Noise Density i
n
0.01 pA/√Hz
1
The input bias and offset currents are characterized at T
A
= T
J
= 85°C. Bias and offset currents are guaranteed but not tested at 40°C.

OP282GS-REEL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Operational Amplifiers - Op Amps DUAL LOW PWR JFET IC HI SPEED 4Mhz
Lifecycle:
New from this manufacturer.
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