Philips Semiconductors
PHP/PHB/PHD82NQ03LT
TrenchMOS™ logic level FET
Product data Rev. 01 — 28 March 2002 2 of 14
9397 750 09308
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
3. Limiting values
Table 2: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
drain-source voltage (DC) 25 ≤ T
j
≤ 175
o
C - 30 V
V
DGR
drain-gate voltage (DC) 25 ≤ T
j
≤ 175
o
C; R
GS
=20kΩ -30V
V
GS
gate-source voltage (DC) - ±20 V
V
GSM
peak gate-source voltage t
p
≤ 50 µs; pulsed; duty cycle = 25 % - ±25 V
I
D
drain current (DC) T
mb
=25°C; V
GS
= 10 V; Figure 2 and 3 -75A
T
mb
= 100 °C; V
GS
=10V;Figure 2 -75A
I
DM
peak drain current T
mb
=25°C; pulsed; t
p
≤ 10 µs; Figure 3 - 240 A
P
tot
total power dissipation T
mb
=25°C; Figure 1 - 136 W
T
stg
storage temperature −55 +175 °C
T
j
operating junction temperature −55 +175 °C
Source-drain diode
I
S
source (diode forward) current (DC) T
mb
=25°C - 75 A
I
SM
peak source (diode forward) current T
mb
=25°C; pulsed; t
p
≤ 10 µs - 240 A