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MAX3964AETP+T

P1-P3P4-P6P7-P9P10-P11
MAX3964A/MAX3968
+3.0V to +5.5V, 125Mbps to 266Mbps
Limiting Amplifiers with Loss-of-Signal Detector
4 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(MAX3964A EV kit, V
CC
= +3.3V, decibels (dB) calculated as 20 log ∆V, PECL outputs terminated with 50Ω to (V
CC
- 2V), T
A
= +25°C,
unless otherwise noted.)
0
0.6
1.2
2.4
1.8
3.0
-50 0-25 25 50 75 100
DATA OUTPUT EDGE SPEED
(20% to 80%) vs. TEMPERATURE
MAX3964/65toc04
TEMPERATURE (°C)
EDGE SPEED (ns)
MAX3968
MAX3964A
LOS OPERATION WITH SQUELCH
MAX3964 toc06
DATA
OUTPUT
LOS+
DATA
INPUT
10µs/div
1ns/div
MAX3964A
EYE DIAGRAM (INPUT = 3.3mV)
MAX3964 toc07
200mV/div
1600
600
0.1 1 10 100 1k 10k
OUTPUT AMPLITUDE vs. INPUT VOLTAGE
(DIFFERENTIAL SIGNAL LEVELS)
800
MAX3964/65toc05
INPUT VOLTAGE (mV)
OUTPUT AMPLITUDE (mV)
1000
1200
1400
MAX3964A/MAX3968
+3.0V to +5.5V, 125Mbps to 266Mbps
Limiting Amplifiers with Loss-of-Signal Detector
_______________________________________________________________________________________ 5
Pin Description
PIN
QSOP
THIN
QFN
NAME FUNCTION
1
19
SQUELCH
Squelch Input. The squelch function disables the data outputs by forcing OUT- low and OUT+
high during a loss-of-signal condition. Connect to GND or leave unconnected to disable.
Connect to V
CC
to enable squelching.
2
20
V
TH
Output of Internal Op Amp that Sets Loss-of-Signal Threshold Voltage (Figure 1). Connect a
resistor from V
TH
to INV and from INV to ground (minimum resistance 100kΩ) to program the
desired threshold voltage.
3 1 INV
Inverting Input of Internal Op Amp that Sets Loss-of-Signal Threshold Voltage (Figure 1).
Connect a resistor from V
TH
to INV and from INV to ground (minimum resistance 100kΩ) to
program the desired threshold voltage.
4 2 FILTER
Filter Output of Full-Wave Logarithmic Detectors (FWDs). The FWD outputs are summed
together at FILTER to generate the received-signal-strength indicator (RSSI). Connect a
capacitor from FILTER to V
CC
for proper operation.
5 3 RSSI
Received-Signal-Strength Indicator Output. The analog DC voltage at RSSI indicates the input
signal power. The RSSI output is reduced approximately 120mV when LOS+ is asserted.
6 4 IN- Inverting Data Input
7 5 IN+ Noninverting Data Input
8 — SUB Substrate. Connect to ground.
9, 10
6, 7, 8
GND Ground
11 9 CZP
Auto-Zero Capacitor Input. Connect a capacitor between CZP and CZN to determine the offset-
correction-loop bandwidth.
12 10 CZN
Auto-Zero Capacitor Input. Connect a capacitor between CZP and CZN to determine the offset-
correction-loop bandwidth.
13 11 V
CCO
Output Buffer Supply Voltage. Connect to the same potential as V
CC
, but filter V
CCO
and V
CC
separately.
14 12 OUT+ Noninverting PECL Data Output. Terminate with 50Ω to (V
CC
- 2V).
15 13 OUT- Inverting PECL Data Output. Terminate with 50Ω to (V
CC
- 2V).
16 14 LOS-
Inverting Loss-of-Signal Output. LOS- is asserted low when input power drops below the LOS
threshold. This pin is PECL compatible and should be terminated with 50Ω to (V
CC
- 2V).
17 15 LOS+
Noninverting Loss-of-Signal Output. LOS+ is asserted high when input power drops below the
LOS threshold. This pin is PECL compatible and should be terminated with 50Ω to (V
CC
- 2V).
18 16 V
CCO
MAX3964A/MAX3968: This pin can be left open or connected to the positive supply.
19, 20
17, 18
V
CC
+3.0V to +5.5V Supply Voltage
—EP
Exposed
Pad
Connect the exposed pad to board ground for optional electrical and thermal performance.
MAX3964A/MAX3968
+3.0V to +5.5V, 125Mbps to 266Mbps
Limiting Amplifiers with Loss-of-Signal Detector
6 _______________________________________________________________________________________
Detailed Description
The MAX3964A contains a series of limiting amplifiers
and power detectors, offset correction, data-squelch cir-
cuitry, and PECL output buffers for data and loss-of-sig-
nal (LOS) outputs. The MAX3968 provides PECL LOS
outputs with data outputs suitable for 266Mbps. Figure 1
shows a functional diagram of the MAX3964A/MAX3968.
Limiting Amplifiers
A series of four limiting amplifiers provides gain of
approximately 65dB.
Power Detector
Each amplifier stage contains a full-wave logarithmic
detector (FWD), which indicates the RMS input signal
power. The FWD outputs are summed together at the
FILTER pin where the signal is filtered by an external
capacitor (CFILTER) connected between FILTER and
V
CC
. The FILTER signal generates the RSSI output volt-
age, which is proportional to the input power in deci-
bels. When LOS+ is low, V
RSSI
is approximated by the
following equation:
V
RSSI
(V) = 1.2V + 0.5log (V
IN
)
where V
IN
is measured in mV
P-P
.
This relation translates to a 25mV increase in V
RSSI
for
every 1dB increase in V
IN
(25mV/dB). The RSSI output is
reduced approximately 120mV when LOS+ is asserted.
PECL Outputs
The data outputs (OUT+, OUT-) and the MAX3964A/
MAX3968 loss-of-signal outputs (LOS+, LOS-) are sup-
ply-referenced PECL outputs. Standard PECL termina-
tion at each output of 50Ω to (V
CC
- 2V) is recommended
for best performance.
Input Offset Correction
A low-frequency feedback loop around the limiting
amplifier improves receiver sensitivity and powerdetec-
tor accuracy. The offset-correction loop’s bandwidth is
determined by an external capacitor (CAZ) connected
between the CZP and CZN pins.
The offset correction is optimized for data streams with
a 50% duty cycle. A different average duty cycle
results in increased pulse-width distortion and loss of
sensitivity. The offset-correction circuitry is less sensi-
tive to variations of input duty cycle (for example, the
40% to 60% duty cycle encountered in 4B/5B coding)
when the input is less than 30mV
P-P
.
CZNCZP
OUT+/OUT-
LOS+/LOS-
RSSI
SQUELCH
LOS+
LOS
COMPARATOR
FILTER
IN+/IN-
V
CC
V
CCO
R1 R2
VTR
SUB
GND
INV
V
CC
C
FILTER
FWD = FULL-WAVE DETECTOR
C
AZ
LIMITER
OFFSET
CORRECTION
LIMITER
I
I
O
LIMITERLIMITER
FWD
FWD
FWD
FWD
1.2V
REFERENCE
MAX3964A
MAX3968
Figure 1. Functional Diagram
P1-P3P4-P6P7-P9P10-P11

MAX3964AETP+T

Mfr. #:
Buy MAX3964AETP+T
Manufacturer:
Maxim Integrated
Description:
Limiting Amplifiers 3-5.5V 125-266Mbps Limiting Amp
Lifecycle:
New from this manufacturer.
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