MAX9130EXT+T Datasheet MAX9130EXT+T | P1-P3

General Description

The MAX9130 is a single low-voltage differential signal-

ing (LVDS) line receiver ideal for applications requiring

high data rates, low power, and low noise. The device

is guaranteed to receive data at speeds up to 500Mbps

(250MHz).

The MAX9130 accepts an LVDS differential input and

translates it to an LVTTL/LVCMOS output. The fail-safe

feature sets the output high when the inputs are undriv-

en and open, terminated, or shorted. The device sup-

ports a wide common-mode input range, allowing a

ground potential difference and common-mode noise

between the driver and the receiver. The MAX9130

conforms to the ANSI/TIA/EIA-644 LVDS standard.

The MAX9130 operates from a single +3.3V supply,

and is specified for operation from -40°C to +85°C. It is

available in a space-saving 6-pin SC70 package. Refer

to the MAX9110/MAX9112 data sheet for single/dual

LVDS line drivers. Refer to the MAX9115 for a lower

speed (200Mbps) single LVDS line receiver in SC70.

Applications

Clock Distribution

Cellular Phone Base Stations

Digital Cross-Connects

Network Switches/Routers

DSLAMs

Features

♦ Space-Saving SC70 Package (50% Smaller than

SOT23)

♦ Guaranteed 500Mbps Data Rate

♦ Low 250ps (max) Pulse Skew

♦ High-Impedance LVDS Inputs When Powered Off

Allow Hot Swapping

♦ Conforms to ANSI TIA/EIA-644 LVDS Standard

♦ Single +3.3V Supply

♦ Fail-Safe Circuit Sets Output High for Undriven

Inputs (Open, Terminated, or Shorted)

♦ Low 150µA (typ) Supply Current in Fail-Safe Mode

MAX9130

Single 500Mbps LVDS Line Receiver in SC70

________________________________________________________________ Maxim Integrated Products 1

Ordering Information

19-2155; Rev 0; 10/01

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

PART

TEMP.

RANGE

PIN-

PACKAGE

TOP

MARK

MAX9130EXT-T -40°C to +85°C 6 SC70-6 ABB

MAX9130

CLOCK

INPUT

CLOCK

SOURCE

CLOCK

INPUT

CLOCK

INPUT

MAX9130

LVDS SIGNALS

REFERENCE CLOCK DISTRIBUTION

USING MAX9130 IN A MULTIDROP CONFIGURATION

MAX9130

100Ω

TERMINATION

Typical Application Circuit

GND

IN+IN-

OUTV

MAX9130

SC70

TOP VIEW

GND

Pin Configuration

MAX9130

Single 500Mbps LVDS Line Receiver in SC70

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

DC ELECTRICAL CHARACTERISTICS

= +3.0V to +3.6V, differential input voltage |V

| = 0.05V to 1.0V, input common voltage V

= |V

/2| to 2.4V - |V

/2|,

= -40°C to +85°C, unless otherwise noted. Typical values at V

= +3.3V, T

= +25°C.) (Notes 2, 3)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional

operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to

absolute maximum rating conditions for extended periods may affect device reliability.

Note 1: Package leads soldered to a PC board having copper ground and V

planes. Do not exceed Maximum Junction Temperature.

to GND...........................................................-0.3V to +4.0V

IN+, IN- to GND.....................................................-0.3V to +4.0V

OUT to GND ...............................................-0.3V to (V

+ 0.3V)

Continuous Power Dissipation (T

= +70°C)

6-Pin SC70 (derate 3.1mW/°C above +70°C).............245 mW

Output Short to GND (OUT) (Note 1)........................................1s

Storage Temperature Range .............................-65°C to +150°C

Maximum Junction Temperature .....................................+150°C

Operating Temperature Range ...........................-40°C to +85°C

ESD Protection

Human Body Model (IN+, IN-) .........................................±6kV

Lead Temperature (soldering, 10s) .................................+300°C

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

LVDS INPUTS (IN+, IN-)

Differential Input High Threshold V

50 mV

Differential Input Low Threshold V

-50 mV

0.05V ≤V

≤ 0.6V -20 20

Input Current I

IN+

IN-

0.6V <V

≤ 1.0V -25 25

µA

0.05V ≤V

≤ 0.6V, V

= 0 -20 20

Power-Off Input Current I

INO

0.6V <V

≤ 1.0V, V

= 0 -25 25

µA

IN1

= +3.6V or 0, Figure 1 35

Input Resistance

IN2

= +3.6V or 0, Figure 1 132

kΩ

LVTTL/LVCMOS OUTPUT (OUT)

Inp uts op en or und r i ven shor t

or und r i ven 100Ω ter m i nati on

- 0.3

Output High Voltage V

= - 8.0m A

= +50mV V

- 0.3

Output Low Voltage V

= +8.0mA, V

= -50mV 0.25 V

Output Short-Circuit Current I

= +50mV, V

OUT

= 0 -125 mA

SUPPLY CURRENT

No load, inputs undriven (fail-safe) 150 300 µA

Supply Current I

No load, inputs driven 7 mA

MAX9130

Single 500Mbps LVDS Line Receiver in SC70

_______________________________________________________________________________________ 3

AC ELECTRICAL CHARACTERISTICS

= +3.0V to +3.6V, C

= 15pF, differential input voltage |V

| = 0.15V to 1.0V, input common voltage V

= |V

/2| to 2.4V - |V

/2|, input rise and fall time = 1ns (20% to 80%), input frequency = 250MHz, T

= -40°C to +85°C, unless otherwise noted. Typical val-

ues at V

= +3.3V, |V

| = 0.2V, V

= 1.2V, T

= +25°C.) (Figures 2 and 3) (Notes 4 and 5)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Differential Propagation Delay

High to Low

PHLD

1.2 1.8 3 ns

Differential Propagation Delay

Low to High

PLHD

1.2 1.8 3 ns

Differential Pulse Skew

PHLD

PLHD

| (Note 6)

SKD1

250 ps

Differential Part-to-Part Skew

(Note 7)

SKD2

1.3 ns

Differential Part-to-Part Skew

(Note 8)

SKD3

1.8 ns

Rise Time t

TLH

0.5 0.8 ns

Fall Time t

THL

0.5 0.8 ns

Maximum Operating Frequency

(Note 9)

MAX

250 MHz

Note 2: Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are production

tested at T

= +25°C.

Note 3: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground

except V

, V

, and V

Note 4: AC parameters are guaranteed by design and characterization.

Note 5: C

includes scope probe and test jig capacitance.

Note 6: t

SKD1

is the magnitude difference of differential propagation delays. t

SKD1

= |t

PHLD

- t

PLHD

Note 7: t

SKD2

is the magnitude difference of any differential propagation delays between parts operating over rated conditions at

the same V

and within 5°C of each other.

Note 8: t

SKD3

is the magnitude difference of any differential propagation delays between parts operating over rated conditions.

Note 9: f

MAX

pulse generator output conditions: rise time = fall time = 1ns (0% to 100%), 50% duty cycle, V

= +1.3V, V

= +1.1V.

MAX9130 output criteria: 60% to 40% duty cycle, V

= 0.25V max, V

= 2.7V min, load = 15pF.

P1-P3 P4-P6 P7-P8

MAX9130EXT+T

Mfr. #:

Buy MAX9130EXT+T

Manufacturer:

Maxim Integrated

Description:

LVDS Interface IC Single 500Mbps LVDS Line Receiver

Lifecycle:

New from this manufacturer.

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MAX9130EXT+T