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ZWIR4512AC1WI

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27
ZWIR4512
Datasheet
© 2016 Integrated Device Technology, Inc.
10
January 27, 2016
Table 2.1 Power Modes Overview
Mode Wakeup Clock Context
1)
I/O Transceiver
Source Time MCU Core Peripherals
Run On On
2)
Retained As configured On
3)
Sleep Any IRQ 1.8 µs Off Off
4)
Retained As configured Off
4)
Stop
RTC IRQ
External IRQ
5.4 µs Off Off Retained As configured Off
4)
Standby
RTC IRQ
Wakeup pin
50 µs Off Off Lost Analog input Off
1) Refers to the status of the RAM and peripheral register contents after wakeup – the backup registers of the MCU are
always available.
2) Clock is enabled for all peripherals that have been enabled by application code and all peripherals that are used by the library.
3) Can be powered off by application code.
4) Remains if peripheral/transceiver is selected as wakeup source.
2.4.1. Run Mode
In Run Mode, all functions of the module are available. The microcontroller and all its peripherals are powered.
Typically the transceiver is also powered, but it can be disabled by software. The module enters Run Mode
automatically after startup. The application software must switch to one of the other operating modes if required.
2.4.2. Sleep Mode
In Sleep Mode, the microcontroller core is not clocked. The power state of the transceiver and the microcontroller
peripherals depends on the wakeup configuration. All peripherals that are selected as a wakeup source continue
to operate. After wakeup, the application program continues execution at the position it was stopped. Sleep Mode
allows reacting to external events such as the reception of data, external interrupts, or timer events. The power
consumption in this mode strongly depends on which peripherals are enabled. The I/O configuration is not
changed during Sleep Mode.
2.4.3. Stop Mode
Stop Mode is an ultra-low-power mode with RAM retention. The MCU core and the MCU peripherals are not
clocked. Only the internal real-time clock or any external pin can be used for triggering wakeup from Stop Mode.
After wakeup, the program continues execution at the position it was stopped. In Stop Mode, all I/Os remain in
the configuration that was active when entering Stop Mode.
2.4.4. Standby Mode
Standby Mode is the lowest power mode. The transceiver and all microcontroller peripherals are consequently
powered off. RAM contents are lost. Waking up from Standby Mode can be triggered by a real-time-timer event
or by one dedicated pin. When going to Standby Mode, all I/Os are put into analog input mode, so the application
circuit must ensure that external components receive defined signal levels if required. When the module exits
Standby Mode, it is restarted from the reset handler in the same sequence as the restart after power-on or after
the reset button has been pressed.
ZWIR4512
Datasheet
© 2016 Integrated Device Technology, Inc.
11
January 27, 2016
3 Application Circuits
ZWIR4512 modules are designed to require minimal external circuitry. The following sections illustrate how
modules must be connected in order to ensure proper power supply, reset behavior, programmability, and radio
performance. Instructions for the connection of GPIO pins are not given.
3.1. Power Supply
All internal components of the ZWIR4512 that require a stable power supply are internally decoupled with a
number of capacitors. Nevertheless, the module requires one external decoupling capacitor between VCC and
GND. This is the minimal external circuitry required for proper operation.
The module provides two different power supply pins: VCC
and VSTDBY. V
CC
is the normal supply voltage that
must be applied in Run, Sleep, or Stop Mode. During Standby Mode, the module is powered by V
STDBY
and V
CC
can be switched off.
Figure 3.1 shows two possible power supply schemes. Scheme a) connects VSTDBY to the same voltage source
as VCC. This is the commonly used configuration. However, scheme b) allows switching off V
CC
in Standby
Mode. This can help reduce power dissipation in applications with ultra-low power requirements. During the
complete standby phase, VSTDBY is powered from a buffering capacitor.
Figure 3.1 Power Supply Schemes
a) Without separate standby supply
v
VSTDBY
VCC
GND
C
1
b) With capacitor based standby supply
v
VCC
GND
VSTDBY
C
1
D
1
R
1
C
2
Table 3.1 External Power Supply Components
Symbol Function Value/Comment
C
1
Decoupling capacitor Mandatory, 10 µF
R
1
Charge current limitation 6.8 kΩ
D
1
Buffering capacitor discharge protection Schottky diode; e.g., BAT54-02V
C
2
Buffering capacitor
≥ 0.1 µF
ZWIR4512
Datasheet
© 2016 Integrated Device Technology, Inc.
12
January 27, 2016
3.2. Reset and Boot Select
The /RESET pin is de-bounced and has a pull-up resistor on the PCB. Thus, a push-button can be connected
directly to GND or the pin can be left unconnected if it is not required. The boot select pin (BSEL) is pulled down
internally. If BSEL is not required, it can be left unconnected. Figure 3.2 shows how these pins are connected
externally and illustrates the internal circuitry.
Figure 3.2 External Circuitry for /RESET and BSEL
GND
/RESET
VCC
3.3. Debug Access
The ZWIR4512 provides debug access by means of a JTAG or SWD interface. Figure 3.3 shows an example of
connecting the module with a 20-pin standard ARM
®
JTAG header. If no JTAG connection is required, the dotted
connections can be left out and two additional pins are available as GPIOs.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27

ZWIR4512AC1WI

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Manufacturer:
IDT
Description:
RF Modules CUSTOM SMD / 30 / 17X28MM - T&R - 7"
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