ZWIR4512
Datasheet
© 2016 Integrated Device Technology, Inc.
4
January 27, 2016
8.2.2. Requirements ....................................................................................................................................... 25
8.3. Supported Antennas ................................................................................................................................... 25
9 Ordering Information ......................................................................................................................................... 25
10 Related Documents ........................................................................................................................................... 26
10.1. Documents Available from IDT ................................................................................................................... 26
10.2. Third-Party Documents ............................................................................................................................... 26
11 Glossary ............................................................................................................................................................ 26
12 Document Revision History ............................................................................................................................... 27
List of Figures
Figure 3.1 Power Supply Schemes ....................................................................................................................... 11
Figure 3.2 External Circuitry for /RESET and BSEL ............................................................................................. 12
Figure 3.3 JTAG / SWD Connection for Programming and Debugging ............................................................... 13
Figure 4.1 ZWIR4512ACx Pinout .......................................................................................................................... 14
Figure 5.1 ZWIR4512AC1 Package Drawing (top, side, and bottom view) .......................................................... 21
Figure 5.2 ZWIR4512AC1 Recommended PCB Footprint (in millimeters) ........................................................... 21
Figure 5.3 ZWIR4512AC2 Package Drawing (top, side and bottom view) ........................................................... 22
Figure 5.4 ZWIR4512AC2 Recommended PCB Footprint (in millimeters) ........................................................... 22
Figure 6.1 Recommended Temperature Profile for Reflow Soldering (according to J-STD-020D) ...................... 23
Figure 8.1 FCC Compliance Statement to be Printed on Equipment Incorporating ZWIR4512 Devices ............. 25
List of Tables
Table 2.1 Power Modes Overview ....................................................................................................................... 10
Table 3.1 External Power Supply Components ................................................................................................... 11
Table 4.1 ZWIR4512ACx Pin Description ............................................................................................................ 15
Table 4.2 ZWIR4512ACx GPIO Remapping ....................................................................................................... 18
Table 4.3 ZWIR4512ACx GPIO Function Overview ............................................................................................ 19
Table 5.1 ZWIR4512AC1 Physical Dimensions and Tolerances ........................................................................ 21
Table 5.2 ZWIR4512AC2 Physical Dimensions and Tolerances ........................................................................ 22
Table 6.1 Soldering Profile Parameters (according to J-STD-020D) .................................................................. 23
ZWIR4512
Datasheet
© 2016 Integrated Device Technology, Inc.
5
January 27, 2016
1 Module Characteristics
1.1. Absolute Maximum Ratings
The absolute maximum ratings are stress ratings only. The device might not function or be operable above the
operating conditions. Stresses exceeding the absolute maximum ratings might also damage the device. In
addition, extended exposure to stresses above the operating conditions might affect device reliability. IDT does
not recommend designing to the “Absolute Maximum Ratings.”
1.1.1. Voltage Characteristics
Parameter Symbol Min Max Unit
Main supply voltage V
CC
-0.3 4
V
Backup supply voltage V
BAT
-0.3 4
Input voltage at 5V-tolerant GPIO pin
V
GPIO
-0.3 5.5
Input voltage at any other GPIO pin -0.3 V
CC
+0.3
1.1.2. Current Characteristics
Parameter Symbol Max Unit
Maximum total current consumption I
VCC
175
mA
Driving strength of each GPIOx pin I
GPIO
±25
Driving strength of RF-control pins (PACTLN, PACTLP, DIG1) I
RFCTRL
8
1.1.3. Thermal Characteristics
Parameter Symbol Value Unit
Storage temperature range T
STOR
-40 to +125
°C
Ambient temperature range T
AMB
-40 to +85
1.2. Operating Conditions
1.2.1. General Operating Conditions
Note: See important notes at the end of the table.
Parameter Symbol Min Typ Max Unit
Electrical Characteristics
Main supply voltage ADC not used V
CC
2.0 3.6
V
Main supply voltage ADC used V
CC
2.4 3.6
Backup supply voltage V
BKUP
1.8 3.6
Digital I/O high level input voltage V
IH
V
CC
0.4
Digital I/O low level input voltage V
IL
0.4
ZWIR4512
Datasheet
© 2016 Integrated Device Technology, Inc.
6
January 27, 2016
Parameter Symbol Min Typ Max Unit
Digital I/O high level output voltage V
OH
V
CC
0.4
Digital I/O low level output voltage V
OL
0.4
MCU Clock Characteristics
MCU core clock frequency
1)
f
AHB
8 64 MHz
MCU core clock frequency accuracy range f
AHB
-2 2.5 %
MCU peripheral bus 1 clock frequency
2)
f
APB1
4
MHz
MCU peripheral bus 2 clock frequency
2)
f
APB2
8
RF Parameters
Frequency range f
RF
865 928 MHz
Output power
3)
-11 10 dBm
Output power tolerance -3 +3 dB
Receiver sensitivity BPSK, EU Mode -110
dBm
BPSK, US Mode -108
QPSK, EU Mode -101
QPSK, US Mode -101
Gross data rate BPSK, EU Mode 20
kBit/s
BPSK, US Mode 40
QPSK, EU Mode 100
QPSK, US Mode 250
Channel spacing EU Mode 1
MHz
US Mode 2
Number of channels EU Mode
4)
1 (+3)
US Mode 10
Input/output impedance 50 Ω
Frequency offset -10 +10 kHz
1) The f
CORE
clock can be configured to be 8, 16, 32, or 64 MHz. After reset, the clock is set to 8 MHz.
2) f
APB1
and f
APB2
are derived from f
AHB
. Therefore, the same tolerances apply to these clocks.
3) 10 dBm output power is only available in US Mode; EU Mode provides 5 dBm maximum output power.
4) The IEEE802.15.4 standard defines only 1 channel for EU Mode, but extension channels are available in almost all EU countries.

ZWIR4512AC2WI

Mfr. #:
Manufacturer:
IDT
Description:
RF Modules CUSTOM SMD / 32 / 15,1X23,1MM -T&R- 7"
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union