Microsemi
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 10
Copyright © 2000
Rev. 1.1, 2006-02-27
WWW.Microsemi .COM
LX1689
Third Generation CCFL Controller
P
RODUCTION
D
ATA
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HEET
TM
®
APPLICATION
SLEEP
VIN
VIN
GND
GND
BRITE
C1
100nF 20%
25V
R1 10Ω
V_BATT
R2 10K 1%
C7 100nF 16V
x
VDD_A
BOUT
AOUT
R12 39Ω
R11 39Ω
C4 1.0µF 20% 16V
C5 470nF 20% 10V
C6 470nF 20% 10V
VDD_P
VDD_A
V_BATT
R3 64.9K 1%
C8
4.7nF
16V
x
R4
12.7K 1%
R6 4.99K
1%
I_LMP
R5 10K
I_SNS
R7
680Ω
OV_SNS
C9
1.0nF
25V
R8
1.0K
C3
22µF 20%
25V TANT
C2
22µF 20%
25V TANT
R9 39Ω
R10 39Ω
AOUT
BOUT
LMT2110
1:32
LMT2110
1:32
C13
100nF
20% 50V
C14
2.0pF
(PCB cap)
C15
2.7nF
5% 25V
COG
R17
47K
R18 270K
VDD_P
OV_SNS
OV_SNS
R14 150Ω
OC_SNS
D1
BAV70WT1
R13 150Ω
D2
BAW56WT1
VDD_P
VDD_P
R15
47K
C12
2.7nF
5% 25V
COG
C11
2.0pF
(PCB Cap)
C10
100nF
20% 50V
CN2
Lamp LO
Lamp HI
CN3
Lamp LO
Lamp HI
R20
274Ω
1%
R19
274Ω
1%
D4
BAW56WT1
D3
BAW56WT1
I_LMP
D5
BAV70WT1
VDD_P
R23
1.0M
R21
1.0M
R24 4.7K
C17
100nF
16V
R22 4.7K
+
-
U4B
LMV393MM
R25 10K
R26 2.2K
+
-
U4A
LMV393MM
VDD_A
I_SNS
x
x
VDD_P
C16
100nF
16V
F1 2A 24V
OC_SNS
U2 Si9945AEY
VISHAY
U2 Si9945AEY
VISHAY
T2 SGE2682-1
MICROSEMI
T1 SGE2682-1
MICROSEMI
Q2
MBT3904DW1T1
C11 & C14 PCB Cap. copper
areas to equal approximately
44
2
mm for 1.0mm thick PCB
CN2 & CN3 Operational RMS
lamp condition @ 6.5mA,
80kHz: 535V ± 15%
Alternate Maximum Lamp Current Table:
VIN power input
functional:12V ±15%
Nominal: 12V ±10%
SLEEP input
(2.5V t 3.3V Logic Level)
ON: Logic "HI" > 1.5V
OFF: Logic "LO" < 0.8V
BRITE Control Range
(Linear DC)
Min. Bright: "LO" < 0.50V
Max. Bright: "HI" > 2.0V
(2.5V to 3.3V PWM Logic)
Min. Bright Positive Duty Cycle: 0%
Max. Bright Positive Duty Cycle: 100%
PWM Freq: 7.5kHz to 100kHz
Burst Rate Freq: 156Hz ±4%
1
2
3
4 5
6
7
8
1
2
3
4
5
6
7
1
2
4
3
5
6
7
8
1
2
3
4
5
6
7
LX1689CPW
GND
AOUT
BOUT
DIM_CLK
DIM_MODE
DIV_248
BRITE_C
BRITE_R
BRITE_IN
ENABLE
I_R
EA_IN
EA_OUT
I_SNS
OV_SNS
OC_SNS
BRITE_OUT
V_BATT
VDD_A
VDD_P
F
IGURE 3 – Typical Dual 4 Watt Application
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Microsemi
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 11
Copyright © 2000
Rev. 1.1, 2006-02-27
WWW.Microsemi .COM
LX1689
Third Generation CCFL Controller
P
RODUCTION
D
ATA
S
HEET
TM
®
DESCRIPTION
FEATURE REVIEW
On-Chip LDO Regulators
Two LDO regulators extend the input voltage range of the IC up
to 28 Volts without using external circuitry as was required with
our previous controllers.
Under Voltage Lockout
If the battery input voltage is too low for the controller to
function properly, it will turn itself off, preventing spurious
operation. If the battery voltage falls to less than 1V where UVLO
is no longer guaranteed, 10K pull down resistors on the A
OUT
and
B
OUT
pins insure the external power FETs cannot be biased on.
Power On Delay
A power up reset delays A
OUT
and B
OUT
turn on for
approximately 16384 x 1/f
O
milliseconds after power is applied.
This gives extra time for the BRITE_IN source voltage to stabilize
so the lamp is not inadvertently powered up at high brightness and
then suddenly lowered, creating an undesirable light flash.
Enhanced BRITE Conditioning Circuitry
The BRITE_IN input is now enhanced to accept either DC
voltage or logic PWM signals. When PWM signals are input, their
levels are clipped at 2V and 0.5V so lamp current will not be
affected by variations in logic signal level. In addition, the
BRITE_C pin permits filtering DC inputs and converting high
frequency PWM inputs to DC voltages with the addition of only a
single external capacitor. A low frequency (less than 500Hz)
PWM signal can be used to directly modulate the duty cycle of the
lamp current. In this case the capacitor at BRITE_C is not
installed.
Digital or Analog Dimming Modes
A DIM_MODE input pin selects either Analog or Digital mode.
In Analog mode DC voltage at BRITE_IN controls lamp current
amplitude. In Digital mode it controls digital dimming duty cycle
with amplitude fixed at a value set by the external current scaling
resistor (BRITE_R). When in Digital mode, the dimming burst
frequency can be synchronous to lamp current by selecting internal
clocking, or to an external clock that may be a multiple of the
video vertical frame rate. With an external clock source, three burst
rate selections are available by programming the DIV_248 input to
divide the source clock by 2,4, or 8. This clock source is further
divided by 64 generating the internal burst ramp waveform. Using
the internal clock as source the DIV_248 input changes to divide
by 4, 8, or 16. This feature allows the designer to set a burst
frequency in the range of 100 to 500Hz. The external clock source
must not be interrupted unless the BRITE_IN is set
> 2V or the
lamp will extinguish.
Brightness Polarity Control
In Analog dimming mode or internal Digital Dimming, the IC
can be programmed to either increase or decrease lamp current
amplitude as a function of increasing signal at the BRITE_IN pin
by simply connecting the DIM_CLK input to ground or VDD_A
or open(see Dimming Table). If External Digital dimming mode is
used, lamp current amplitude is constant and its duty cycle is
always directly proportional to DC input voltage and / or PWM
duty cycle at the BRITE_IN pin.
Lamp Current Compensation
The BRITE_OUT pin outputs a precision current that is
proportional to the BRITE_IN signal. This current can be applied to
a precision resistor to develop the brightness control voltage at the
error amplifiers non-inverting input. Since the output is constant
current, designers can easily compensate lamp current with respect
to temperature, input voltage, ambient or lamp light output, and
combinations of these conditions by using various temperature or
light sensitive components in combination with resistors. This
capability is very useful in automotive and outdoor applications
where operating temperatures and ambient light vary over wide
ranges. See functional pin description for details.
Strike Voltage Generation
Improved strike voltage generation circuits ramp strike voltage to
5X f
O
and repeats it’s cycle unless excessive high voltage is sensed
at OV_SNS. If OV_SNS is detected during strike, strike voltage
will not ramp and will hold the current voltage until total strikes
lamp cycles numbers reach 245,760. Strike potential is removed
immediately when the lamp strikes or if the time limit is reached.
Strike Detection
The LX1689 includes a new lamp strike detection scheme that
saves a package pin and three external components. Internal circuits
monitor lamp current pulses at the I_SNS input to determine if the
lamp strikes and if it stays ignited once operational.
Fault Time Out
If the lamp fails to ignite with in approximately 1.6 seconds
(depending on Run Frequency) at maximum strike potential, or if it
extinguishes while enabled, or the external clock frequency at the
DIM_CLK pin terminates, the output drive is shut down and the
BRITE_C pin is driven high. This pin can be monitored with a
CMOS gate to obtain a logical indication that a lamp fault has
occurred. It is especially useful in multiple lamp applications or for
system diagnostic input.
The voltage on pin BRITE_C will vary directly with BRITE
input voltage, but does not exceed 1.2V unless a fault condition
occurs.
On Chip Rectifier
Integrating full wave rectifiers for each of three lamp inputs has
significantly reduced lamp feedback component count. Current
Sense (I_SNS), Over Current Sense (OC_SNS) and Over Voltage
Sense (OV_SNS) signals are now detected using only one external
scaling resistor or capacitor each. Rectification accuracy is
improved with high performance on chip rectifiers to provide better
lamp current and voltage regulation.
Complete Fault Protection
In addition to the faulty lamp time out, lamp open, lamp shorted,
and either lamp terminal shorted to ground are detected. Open
circuit voltage can never go higher than the preset maximum strike
potential and total current from the circuit is safely limited with a
scaling resistor. UL safety specifications can now be easily met in
any application.
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Microsemi
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 12
Copyright © 2000
Rev. 1.1, 2006-02-27
WWW.Microsemi .COM
LX1689
Third Generation CCFL Controller
P
RODUCTION
D
ATA
S
HEET
TM
®
DESCRIPTION (CONTINUED)
LX1689 OPERATION
Four operating modes: Power On Delay, Strike, Run, and Fault
modes are employed by the LX1689. Upon power up or ENABLE
going true, Power On Delay is automatically invoked.
Immediately after termination of Power On Delay, or ENABLE
going true, strike mode is entered. After a successful strike, e.g.
lamp is ignited, run mode is entered. If ignition is unsuccessful, or
if the lamp extinguishes while running, Fault mode is entered.
Lamp ignition is determined by monitoring the lamp current
feedback voltage at pin I_SNS. Lamp current cycles are counted
from the beginning of Strike mode. If 8 or more complete cycles
occur the lamp is declared ignited. If less than 8, the lamp is
considered not ignited and Strike mode continues until ignition is
detected or strike time out is reached.
After run mode is entered lamp current cycles are sampled every
8192 x 1/f
O
to determine that the lamp has not inadvertently
extinguished. If at least 8 lamp current pulses are counted in each
sample, Run mode is maintained. Otherwise, Fault mode is
entered. Strike mode can be entered only once for each on/off cycle
of either V_BATT or ENABLE. This insures that even
intermittent lamp failures cannot cause the module to continuously
output maximum strike voltage.
Power ON Delay Mode
All functions are activated except that AOUT and BOUT are
inhibited. Delay is 16384 x 1/f
O
determined by counting Ramp
clocks. The first of 16 sweeps is decoded as the power on delay
period. The subsequent 15 sweeps are used for controlling the
Ramp generator during Strike Mode. Power on delay is activated
at every V_BATT power up sequence and ENABLE sequence.
Strike Mode
Entered from Power On Delay, or upon an ENABLE sequence.
Control of the Ramp Generator frequency is switched to a DAC
output. Frequency is increased in a saw tooth fashion from normal
run value to as high as five times that value, for up to 15 sweeps.
If while strike frequency is ramping up, the over voltage set point
at OV_SNS is detected, strike frequency will freeze at that value
until either the lamp strikes or the timeout is reached. Strike Mode
is terminated by reaching 15 sweep counts or by detecting lamp
ignition. If strike is successful, Run Mode is entered. If
unsuccessful, Fault mode is entered, a fault is declared and the A &
B outputs are shut off.
The purpose of sweeping lamp frequency up during strike is to
operate at the unloaded resonant frequency of the transformer and
lamp load. This generates the high lamp striking voltage required,
since at resonance, output voltage from the transformer will
increase to any value needed to cause ignition. A capacitive
voltage divider provides output voltage feedback to the OV_SNS
pin, which freezes Strike Frequency to limit maximum output
voltage to a safe value.
Since strike frequency is held constant once the LX1689 senses
maximum safe output voltage, maximum strike potential is
continuously impressed across the lamp for the entire strike period.
Because strike frequency is ramped up rather than simply
stepped, the entire range of possible self-resonant frequencies is
covered. Transformer manufacturing is simplified and parasitic
panel capacitance values are no longer critical. The 5:1 strike
frequency range easily covers the self-resonant frequency of all
practical lamp assembly and transformer combinations.
The only way to re-initiate the strike process is to either cycle
V_BATT or ENABLE off and on.
If ignition is successful, ramp frequency immediately returns to
its normal run value.
Run Mode
Entered only by detection of a successful Strike. Ramp generator
frequency control is immediately switched from DAC output to a
fixed reference that sets the normal run frequency. During Run
mode, the Fault Detect Counter is reset approximately every 8192 x
1/f
O
. The lamp current cycle counter is monitored to insure at least
8 current cycles received during each period. If less than 8, the
lamp is considered extinguished and the Fault Mode is entered.
Fault Mode
Fault Mode may be entered from either Strike or Run Mode as
described above. In Fault Mode, the A & B output drivers are
forced low and the BRITE_C pin is driven to VDD_A to indicate
the fault condition. Fault mode may be cleared by cycling
ENABLE off then on, or by removing and applying V_BATT.
External load on the BRITE_C pin is limited to a filter capacitor and
single CMOS gate input.
DESIGN PROCEDURE
Selecting the I_R resistor value
This resistor determines the frequency of the on chip oscillator.
The output of the oscillator, RAMP_C, controls all timing functions.
It must be chosen first, and will be in the range of 10K to 150K
ohms. The output frequency approximated by the following
formula : R
I_R
= 5.24E
9
/ FLAMP
OUT(Hz)
RAMP_C frequency is twice lamp output current frequency.
Driving the BRITE_IN Input
BRITE_IN can be a DC voltage, a low frequency PWM signal
that produces direct digital dimming, or a higher frequency PWM
signal that is converted to a proportional DC level by adding a filter
capacitor at the BRITE_C pin. 100% duty cycle corresponds to 1.1
volt, and 0% duty cycle corresponds to zero volts at the BRITE_C
pin. Maximum BRITE_IN input frequency for PWM inputs is 100
KHz, but when converting frequencies above 25 KHz to DC, some
accuracy is lost. The BRITE_IN input circuitry includes on-chip
active voltage clamps that ignore input voltage greater than 2.0V
and less than 0.5V. This allows the use of digital PWM input
signals where brightness is dependent only on duty cycle, with no
contribution
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LX1689IPW

Mfr. #:
Manufacturer:
Microchip / Microsemi
Description:
Display Drivers & Controllers CCFL Backlight Controller IC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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