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ADG442BRZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
ADG441/ADG442/ADG444 Data Sheet
Rev. B | Page 10 of 16
Figure 19. Off Isolation
Figure 20. Channel-to-Channel Crosstalk
SD
V
S
V
OUT
IN
V
SS
GND
V
SS
V
DD
–15V
+15V +5V
R
L
50
0.1F
0.1F
0.1F
V
IN
05233-021
SD
V
S
NC
V
SS
GND
V
SS
V
DD
–15V
+15V +5V
50
0.1F
0.1F
0.1F
V
IN1
V
IN2
V
OUT
05233-022
R
L
50
CHANNEL-TO-CHANNEL CROSSTALK = 20× LOG |V
S
/V
OUT
|
Data Sheet ADG441/ADG442/ADG444
Rev. B | Page 11 of 16
TERMINOLOGY
R
ON
Ohmic resistance between D and S.
R
ON
Match
Difference between the R
ON
of any two channels.
I
S
(OFF)
Source leakage current with the switch OFF.
I
D
(OFF)
Drain leakage current with the switch OFF.
I
D
, I
S
(ON)
Channel leakage current with the switch ON.
V
D
(V
S
)
Analog voltage on Terminals D, S.
C
S
(OFF)
OFF switch source capacitance.
C
D
(OFF)
OFF switch drain capacitance.
C
D
, C
S
(ON)
ON switch capacitance.
t
ON
Delay between applying the digital control input and the output
switching on.
t
OFF
Delay between applying the digital control input and the output
switching off.
t
OPEN
Break-before-make delay when switches are configured as a
multiplexer.
Crosstalk
A measure of unwanted signal which is coupled through from
one channel to another as a result of parasitic capacitance.
Off Isolation
A measure of unwanted signal coupling through an OFF switch.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
ADG441/ADG442/ADG444 Data Sheet
Rev. B | Page 12 of 16
TRENCH ISOLATION
In the ADG441A, ADG442A, and ADG444A, an insulating
oxide layer (trench) is placed between the NMOS and the
PMOS transistors of each CMOS switch. Parasitic junctions,
which occur between the transistors in junction isolated
switches, are eliminated, and the result is a completely latch-up
proof switch.
In junction isolation, the N and P wells of the PMOS and
NMOS transistors form a diode that is reverse-biased under
normal operation. However, during overvoltage conditions, this
diode becomes forward-biased. A silicon-controlled rectifier
(SCR) type circuit is formed by the two transistors causing a
significant amplification of the current which, in turn, leads to
latch-up. With trench isolation, this diode is removed, and the
result is a latch-up proof switch.
Figure 21. Trench Isolation
05233-004
BURIED OXIDE LAYER
SUBSTRATE (BACK GATE)
TRENCH
P-WELL N-WELL
LOCO
NMOS PMOS
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

ADG442BRZ

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Manufacturer:
Analog Devices Inc.
Description:
Analog Switch ICs LC2MOS Quad SPST
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New from this manufacturer.
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