MC10EL31DR2G

© Semiconductor Components Industries, LLC, 2016
July, 2016 Rev. 7
1 Publication Order Number:
MC10EL31/D
MC10EL31, MC100EL31
5 V ECL D Flip‐Flop
With Set and Reset
Description
The MC10EL/100EL31 is a D flip-flop with set and reset. The
device is functionally equivalent to the E131 device with higher
performance capabilities. With propagation delays and output
transition times significantly faster than the E131, the EL31 is ideally
suited for those applications which require the ultimate in AC
performance.
Both set and reset inputs are asynchronous, level triggered signals.
Data enters the master portion of the flip-flop when clock is LOW and
is transferred to the slave, and thus the outputs, upon a positive
transition of the clock.
The 100 Series contains temperature compensation.
Features
475 ps Propagation Delay
2.8 GHz Toggle Frequency
ESD Protection:
> 1 kV Human Body Model
> 100 V Machine Model
PECL Mode Operating Range: V
CC
= 4.2 V to 5.7 V
with V
EE
= 0 V
NECL Mode Operating Range: V
CC
= 0 V
with V
EE
= 4.2 V to 5.7 V
Internal Input Pulldown Resistors on D, CLK, S, and R
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity:
Level 1 for SOIC8 NB
Level 3 for TSSOP8
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 V0 @ 0.125 in,
Oxygen Index: 28 to 34
Metastability 125 ps (see Application Note AN1504)
Transistor Count = 79 Devices
These Devices are Pb-Free, Halogen Free and are RoHS Compliant
HL31
ALYWG
G
*For additional marking information, refer to
Application Note AND8002/D
.
MARKING DIAGRAMS*
KL31
ALYWG
G
SOIC8 NB
D SUFFIX
CASE 75105
TSSOP8
DT SUFFIX
CASE 948R02
1
8
1
8
ORDERING INFORMATION
www.onsemi.com
1
8
(Note: Microdot may be in either location)
KEL31
ALYW
G
1
8
1
8
HEL31
ALYW
G
1
8
H = MC10
K = MC100
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb-Free Package
See detailed ordering and shipping information on page 6 of
this data sheet.
SOIC8 NB TSSOP8
MC10EL31, MC100EL31
www.onsemi.com
2
1
2
3
45
6
7
8
Q
V
EE
V
CC
Figure 1. Logic Diagram and Pinout Assignment
D
Q
CLK
R
D
S
R
S
D
L
H
X
X
X
Table 1. TRUTH TABLE
S*
L
L
H
L
H
R*
L
L
L
H
H
CLK
Z
Z
X
X
X
Q
L
H
H
L
Undef
Z = LOW to HIGH Transition
S ECL Set Input
D ECL Data Input
R ECL Reset Input
CLK ECL Clock Input
Q, Q
ECL Data Outputs
V
CC
Positive Supply
V
EE
Negative Supply
Table 2. PIN DESCRIPTION
FUNCTION
* Pins will default low when left open.
PIN
Table 3. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Unit
V
CC
PECL Mode Power Supply- V
EE
= 0 V 8 V
V
EE
NECL Mode Power Supply V
CC
= 0 V 8 V
V
I
PECL Mode Input Voltage
NECL Mode Input Voltage
V
EE
= 0 V
V
CC
= 0 V
V
I
V
CC
V
I
V
EE
6
6
V
I
out
Output Current Continuous
Surge
50
100
mA
T
A
Operating Temperature Range 40 to +85 °C
T
stg
Storage Temperature Range 65 to +150 °C
q
JA
Thermal Resistance (Junction-to-Ambient) 0 lfpm
500 lfpm
SOIC8 NB
SOIC8 NB
190
130
°C/W
q
JC
Thermal Resistance (Junction-to-Case) Standard Board SOIC8 NB 41 to 44 °C/W
q
JA
Thermal Resistance (Junction-to-Ambient) 0 lfpm
500 lfpm
TSSOP8
TSSOP8
185
140
°C/W
q
JC
Thermal Resistance (Junction-to-Case) Standard Board TSSOP8 41 to 44 ±5% °C/W
T
sol
Wave Solder (Pb-Free) < 2 to 3 sec @ 260°C 265 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
MC10EL31, MC100EL31
www.onsemi.com
3
Table 4. 10EL SERIES PECL DC CHARACTERISTICS (V
CC
= 5.0 V; V
EE
= 0 V (Note 1))
Symbol
Characteristic
40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
I
EE
Power Supply Current 27 32 27 32 27 32 mA
V
OH
Output HIGH Voltage (Note 2) 3920 4010 4110 4020 4105 4190 4090 4185 4280 mV
V
OL
Output LOW Voltage (Note 2) 3050 3200 3350 3050 3210 3370 3050 3227 3405 mV
V
IH
Input HIGH Voltage 3770 4110 3870 4190 3940 4280 mV
V
IL
Input LOW Voltage 3050 3500 3050 3520 3050 3555 mV
I
IH
Input HIGH Current 150 150 150
mA
I
IL
Input LOW Current 0.5 0.5 0.3
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary +0.25 V / 0.5 V.
2. Outputs are terminated through a 50 ohm resistor to V
CC
2 volts.
Table 5. 10EL SERIES NECL DC CHARACTERISTICS (V
CC
= 0 V; V
EE
= 5.0 V (Note 1))
Symbol
Characteristic
40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
I
EE
Power Supply Current 27 32 27 32 27 32 mA
V
OH
Output HIGH Voltage (Note 2) 1080 990 890 980 895 810 910 815 720 mV
V
OL
Output LOW Voltage (Note 2) 1950 1800 1650 1950 1790 1630 1950 1773 1595 mV
V
IH
Input HIGH Voltage 1230 890 1130 810 1060 720 mV
V
IL
Input LOW Voltage 1950 1500 1950 1480 1950 1445 mV
I
IH
Input HIGH Current 150 150 150
mA
I
IL
Input LOW Current 0.5 0.5 0.3
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary +0.25 V / 0.5 V.
2. Outputs are terminated through a 50 ohm resistor to V
CC
2 volts.

MC10EL31DR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Flip Flops 5V ECL D-Type w/Set and Reset
Lifecycle:
New from this manufacturer.
Delivery:
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