MAX5115/MAX5116
Nonvolatile, Quad, 8-Bit DACs with 2-Wire Serial
Interface
16 ______________________________________________________________________________________
the device remains powered. The nonvolatile register
maintains data even after power is removed. The
MAX5115/MAX5116 start up (power first applied) by
transferring the mute/power-down from the nonvolatile
to the volatile control register. The nonvolatile control
register is set to 00 hex at the factory.
Power-On Reset
Power-on reset (POR) circuitry controls the initializa-
tion of the MAX5115/MAX5116. A power-on reset
loads the volatile registers with the data stored in the
nonvolatile registers.
This initialization period takes 500µs (typ). During this
time, the DAC outputs are held in mute mode. At the
completion of the initialization period, the DAC outputs
update in accordance with the configuration register.
DAC Data
The 8-bit DAC data is decoded as offset binary, MSB
first, with 1 LSB = (V
REFH_
- V
REFL_
) / 256, and convert-
ed into the corresponding analog voltage as shown in
Table 9.
NONVOLATILE
(NV)
VOLATILE
(V)
FUNCTION
0 1 Read from VREG_
1 0 Read from NVREG_
Table 5. Volatile and Nonvolatile Read
Selection
R3 R2 R1 R0 FUNCTION
0 0 0 0 DAC0
0 0 0 1 DAC1
0 0 1 0 DAC2
0 0 1 1 DAC3
Table 6. DAC Read Selection
DATA BYTE
ADDRESS
BYTE
COMMAND BYTE
MSB LSB
COMMAND
S
T
A
R
T
R/
W
A
C
K
C
7
C
6
C
5
C
4
C
3
C
2
C
1
C
0
A
C
K
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
A
C
K
STOP
Write VCTL S 0 0 0 0 1 0 1 0 0 Control register* P
Write NVCTL S 0 0 0 1 0 0 1 0 0 Control register* P
Write VCTL
and NVCTL
S 0 0 0 1 1 0 1 0 0 Control register* P
Transfer
NVCTL to
VCTL
S 0 0 0 0 0 0 1 0 0 Control register* P
Table 7. Mute/Power-Down Operation
*See Mute/Power-Down Control Register (Table 8).
BIT IN REGISTER
D7
(MSB)
D6 D5 D4 D3 D2 D1
D0
(LSB)
CONTROLLING
FUNCTION
Mute DAC3 Mute DAC2 Mute DAC1 Mute DAC0
Power-down
DAC3
Power-down
DAC2
Power-down
DAC1
Power-down
DAC0
Table 8. Mute/Power-Down Control Register
MAX5115/MAX5116
Nonvolatile, Quad, 8-Bit DACs with 2-Wire Serial
Interface
______________________________________________________________________________________ 17
Applications Information
DAC Linearity and Offset Voltage
The output buffer can have a negative input offset volt-
age that would normally drive the output negative, but
with no negative supply, the output remains at GND
(Figure 10). Determine linearity using the end-point
method, measuring between code 10 (0A hex) and
code 240 (F0 hex) after calibrating the offset and gain
error (Figure 10).
External Voltage Reference
The MAX5115 features two reference inputs for each
DAC (REFH_ and REFL_). The MAX5116 uses a single
reference for all four DACs (REFH and REFL). REFH_
sets the full-scale voltage, while REFL_ sets the zero
code output. The MAX5115 has a 460kΩ typical input
impedance that is independent of the code. The
MAX5116 has a 115kΩ typical input impedance that is
independent of the code.
Power Sequencing
The voltage applied to REFH_ and REFL_ should not
exceed V
DD
at any time. If proper power sequencing is
not possible, connect an external Schottky diode
between REFH_, REFL_, and V
DD
to ensure compliance
with the absolute maximum ratings. Do not apply signals
to the digital inputs before the device is fully powered.
Power-Supply Bypassing and
Ground Management
Digital or AC transient signals on GND can create noise
at the analog output. Return GND to the highest-quality
ground available. Bypass V
DD
with a 0.1µF capacitor,
located as close to the device as possible. Bypass
REFH_ and REFL_ to GND with 0.1µF capacitors.
Careful PC board ground layout minimizes crosstalk
between the DAC outputs and digital inputs.
DAC
CODE
OUTPUT
VOLTAGE (V)
1111 1111
1000 0000
0000 0001
0000 0000 V
REFL_
Table 9. Unipolar Code Output Voltage
O
DAC CODE
NEGATIVE
OFFSET
OUTPUT
VOLTAGE
Figure 10. Effect of Negative Offset (Single Supply)
255
256
×−
+
()
__
_
VV
V
REFH REFL
REFL
128
256
×−
+
(
__
_
VV
V
REFH REFL
REFL
256
+
()
__
_
VV
V
REFH REFL
REFL
MAX5115/MAX5116
Nonvolatile, Quad, 8-Bit DACs with 2-Wire Serial
Interface
18 ______________________________________________________________________________________
R
P
R
P
V
DD
V
DD
V
DD
μC
SDA SCL
SDA
REFH0
SCL
V
DD
OUT0
OUT2
R
S
*
R
S
*
R
S
*
R
S
*
REFH2
REFL0 A3
A0
SDA
REFH
SCL
REFL
ADDRESS
0101 111
ADDRESS
0101 110
*OPTIONAL
MAX5115
MAX5115
OUT3
REFH3
OUT1
REFH1
REFL1
A2
REFL2
A1
REFL3
REFH0 OUT0
OUT2
REFH2
REFL0 A3
A0
OUT3
REFH3
OUT1
REFH1
REFL1
A2
REFL2
A1
REFL3
Typical Operating Circuit
TOP VIEW
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
A3 SDA
V
DD
SCL
REFH
REFL
OUT0
OUT3
MUTE
MAX5116
QSOP
A2
A1
OUT1
A0
N.C.
OUT2
GND
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
A3
SDA
V
DD
SCLREFH1
A0
A1
A2
REFH0
REFL0
OUT0
REFH3REFL2
REFH2
OUT1
REFL1
12
11
9
10
REFL3
OUT3GND
OUT2
MAX5115
QSOP
Pin Configurations
Chip Information
TRANSISTOR COUNT: 40,209
PROCESS: BiCMOS

MAX5116EEE+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Digital to Analog Converters - DAC 8-Bit 4Ch Precision DAC
Lifecycle:
New from this manufacturer.
Delivery:
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