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MM74C906M

P1-P3P4-P5
© 2002 Fairchild Semiconductor Corporation DS005911 www.fairchildsemi.com
October 1987
Revised February 2002
MM74C906 • MM74C907 Hex Open Drain N-Channel Buffers • Hex Open Drain P-Channel Buffers
MM74C906 • MM74C907
Hex Open Drain N-Channel Buffers •
Hex Open Drain P-Channel Buffers
General Description
The MM74C906 and MM74C907 buffers employ monolithic
CMOS technology in achieving open drain outputs. The
MM74C906 consists of six inverters driving six N-channel
devices; and the MM74C907 consists of six inverters driv-
ing six P-channel devices. The open drain feature of these
buffers makes level shifting or wire AND and wire OR func-
tions by just the addition of pull-up or pull-down resistors.
All inputs are protected from static discharge by diode
clamps to V
CC
and to ground.
Features
■ Wide supply voltage range: 3V to 15V
■ Guaranteed noise margin: 1V
■ High noise immunity: 0.45 V
CC
(typ.)
■ High current sourcing and sinking open drain outputs
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Assignments for DIP and SOIC
Top View
Logic Diagrams
MM74C906
MM74C907
Order Number Package Number Package Description
MM74C906M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
MM74C906N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
MM74C907N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
www.fairchildsemi.com 2
MM74C906 • MM74C907
Absolute Maximum Ratings(Note 1)
Note 1: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. Except for “Operating Tempera-
ture Range” they are not meant to imply that the devices should be oper-
ated at these limits. The table of “Electrical Characteristics” provides
conditions for actual device operation.
DC Electrical Characteristics
Min/Max limits apply across temperature range unless otherwise noted
Voltage at Any Input Pin −0.3V to V
CC
+0.3V
Voltage at Any Output Pin
Operating Temperature Range
MM74C906/MM74C907
−40°C to +85°C
Storage Temperature Range
−65°C to +150°C
Power Dissipation
Dual-In-Line 700 mW
Small Outline 500 mW
Operating V
CC
Range 3V to 15V
Absolute Maximum V
CC
18V
Lead Temperature (T
L
)
(Soldering, 10 seconds) 260
°C
Symbol Parameter Conditions Min Typ Max Units
CMOS TO CMOS
V
IN(1)
Logical “1” Input Voltage V
CC
= 5V 3.5 V
V
CC
= 10V 8.0 V
V
IN(0)
Logical “0” Input Voltage V
CC
= 5V 1.5 V
V
CC
= 10V 2 V
I
IN(1)
Logical “1” Input Current V
CC
= 15V, V
IN
= 15V 0.005 1 µA
I
IN(0)
Logical “0” Input Current V
CC
= 15V, V
IN
= 0V −1.0 −0.005 µA
I
CC
Supply Current V
CC
= 15V, Output Open 0.05 15 µA
Output Leakage
MM74C906 V
CC
= 4.75V, V
IN
= V
CC
− 1.5V 0.005 5 µA
V
CC
= 4.75V, V
OUT
= 18V
MM74C907 V
CC
= 4.75V, V
IN
= 1V + 0.1 V
CC
0.005 5 µA
V
CC
= 4.75V, V
OUT
= V
CC
− 18V
CMOS/LPTTL INTERFACE
V
IN(1)
Logical “1” Input Voltage V
CC
= 4.75V V
CC
− 1.5V V
V
IN(0)
Logical “0” Input Voltage V
CC
= 4.75V 0.8 V
OUTPUT DRIVE CURRENT
MM74C906 V
CC
= 4.75V, V
IN
= 1V + 0.1 V
CC
V
CC
= 4.75V, V
OUT
= 0.5V 2.1 8.0 mA
V
CC
= 4.75V, V
OUT
= 1.0V 4.2 12.0 mA
MM74C907 V
CC
= 4.75V, V
IN
= V
CC
− 1.5V
V
CC
= 4.75V, V
OUT
= V
CC
− 0.5V −1.05 −1.5 mA
V
CC
= 4.75V, V
OUT
= V
CC
− 1V −2.1 −3.0 mA
MM74C906 V
CC
= 10V, V
IN
= 2V
V
CC
= 10V, V
OUT
= 0.5V 4.2 20 mA
V
CC
= 10V, V
OUT
= 1V 8.4 30 mA
MM74C907 V
CC
= 10V, V
IN
= 8V
V
CC
= 10V, V
OUT
= 9.5V −2.1 −4.0 mA
V
CC
= 10V, V
OUT
= 9V −4.2 −8.0 mA
3 www.fairchildsemi.com
MM74C906 • MM74C907
AC Electrical Characteristics (Note 2)
T
A
= 25°C, C
L
= 50 pF, unless otherwise specified
Note 2: AC Parameters are guaranteed by DC correlated testing.
Note 3: “C” used in calculating propagation includes output load capacity (C
L
) plus device output capacity (C
OUT
).
Note 4: Capacitance is guaranteed by periodic testing.
Note 5: C
PD
determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics Application Note,
AN-90. (Assumes outputs are open).
Typical Applications
Wire OR Gate
Note: Can be extended to more than 2 inputs.
Wire AND Gate
Note: Can be extended to more than 2 inputs.
CMOS or TTL to PMOS Interface
Note: V
CC
+ V
DD
≤ 18V
V
CC
≤ 15V
CMOS or TTL to CMOS at a Higher V
CC
Symbol Parameter Conditions Min Typ Max Units
t
pd
Propagation Delay Time
to a Logical “0”
MM74C906 V
CC
= 5.0V, R = 10k 150 ns
V
CC
=10V, R = 10k 75 ns
MM74C907 V
CC
= 5.0V (Note 3) 150 + 0.7 RC ns
V
CC
= 10V (Note 3) 75 + 0.7 RC ns
t
pd
Propagation Delay Time
to a Logical “1”
MM74C906 V
CC
= 5.0V (Note 3) 150 + 0.7 RC ns
V
CC
= 10V (Note 3) 75 + 0.7 RC ns
MM74C907 V
CC
= 5.0V, R = 10k 150 ns
V
CC
= 10V, R = 10k 75 ns
C
IN
Input Capacitance (Note 4) 5.0 pF
C
OUT
Output Capacity (Note 4) 20 pF
C
PD
Power Dissipation Capacity (Note 5) Per Buffer 30 pF
P1-P3P4-P5

MM74C906M

Mfr. #:
Buy MM74C906M
Manufacturer:
ON Semiconductor / Fairchild
Description:
Buffers & Line Drivers Hex N-Chan Buffer
Lifecycle:
New from this manufacturer.
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