MAX5941A/MAX5941B
IEEE 802.3af-Compliant Power-Over-Ethernet
Interface/PWM Controller for Power Devices
______________________________________________________________________________________ 13
MAX5941A/MAX5941B
The PSE determines the class of a PD by applying a volt-
age at the PD input and measures the current sourced
out of the PSE. When the PSE applies a voltage between
12.6V and 20V, the MAX5941A/MAX5941B exhibit a cur-
rent characteristic with values indicated in Table 2. The
PSE uses the classification current information to classify
the power requirement of the PD. The classification cur-
rent includes the current drawn by the 25.5k detection
signature resistor and the supply current of the
MAX5941A/MAX5941B so that the total current drawn by
the PD is within the IEEE 802.3af standard figures. The
classification current is turned off whenever the device is
in power mode.
Power Mode
During power mode, when V
IN
rises above the
undervoltage lockout threshold (V
UVLO,ON
), the
MAX5941A/ MAX5941B gradually turn on the internal N-
channel MOSFET Q1 (see Figure 2). The MAX5941A/
MAX5941B charge the gate of Q1 with a constant current
source (10µA, typ). The drain-to-gate capacitance of Q1
limits the voltage rise rate at the drain of MOSFET, there-
by limiting the inrush current. To reduce the inrush cur-
rent, add external drain-to-gate capacitance (see the
Inrush Current section). When the drain of Q1 is within
1.2V of its source voltage and its gate-to-source voltage is
above 5V, the MAX5941A/MAX5941B assert the PGOOD/
PGOOD outputs. The MAX5941A/MAX5941B have a wide
UVLO hysteresis and turn-off deglitch time to compensate
for the high impedance of the twisted-pair cable.
Undervoltage Lockout
The MAX5941A/MAX5941B operate up to a 67V supply
voltage with a default UVLO turn-on set at 39V and a
UVLO turn-off set at 30V. Adjust the UVLO threshold
using a resistor-divider connected to UVLO (see Figure
3). When the input voltage is above the UVLO threshold
(V
UVLO,ON
), the IC is in power mode and the MOSFET is
on. When the input voltage goes below the UVLO thresh-
old (V
UVLO,OFF
) for more than t
OFF_DLY
, the MOSFET
turns off.
To adjust the UVLO threshold, connect an external
resistor-divider from GND to UVLO and from UVLO to
V
EE
. Use the following equations to calculate R1 and
R2 for a desired UVLO threshold:
R1 = 25.5k - R2
where V
IN, EX
is the desired UVLO threshold. Since the
resistor-divider replaces the 25.5k PD detection resis-
tor, ensure that the sum of R1 and R2 equals 25.5k
±1%. When using the external resistor-divider, the
MAX5941 has an external reference voltage hysteresis of
20% (typ). In other words, when UVLO is programmed
externally, the turn-off threshold is 80% (typ) of the new
UVLO turn-on threshold.
Inrush Current Limit
The MAX5941A/MAX5941B charge the gate of the inter-
nal MOSFET with a constant current source (10µA, typ).
The drain-to-gate capacitance of the MOSFET limits the
voltage rise rate at the drain, thereby limiting the inrush
current. Add an external capacitor from GATE to OUT
to further reduce the inrush current. Use the following
equation to calculate the inrush current:
The recommended inrush current for a PoE application
is 100mA.
PGOOD/
PGOOD
Outputs
PGOOD is an open-drain, active-high logic output.
PGOOD goes high impedance when V
OUT
is within 1.2V
of V
EE
and when GATE is 5V above V
EE
. Otherwise,
PGOOD is pulled to V
OUT
(given that V
OUT
is at least 5V
below GND). Connect PGOOD to SS_SHDN to enable the
PWM controller. No external pullup resistor is required.
PGOOD is an open-drain, active-low logic output.
PGOOD is pulled to V
EE
when V
OUT
is within 1.2V of V
EE
and when GATE is 5V above V
EE
. Otherwise, PGOOD
goes high impedance.
IIx
C
C
INRUSH G
OUT
GATE
=
Rkx
V
V
REF UVLO
IN EX
2255= .
,
,
R1
UVLO
GND
V
EE
R2
V
IN
= 24V TO 60V
MAX5941A
MAX5941B
Figure 3. Setting Undervoltage Lockout with an External
Resistor-Divider
MAX5941A/MAX5941B
IEEE 802.3af-Compliant Power-Over-Ethernet
Interface/PWM Controller for Power Devices
14 ______________________________________________________________________________________
Thermal Dissipation
During classification mode, if the PSE applies the maxi-
mum DC voltage, the maximum voltage drop from GND
to V
RCL
will be 13V. If the maximum classification current
of 42mA flows through the MAX5941A/MAX5941B, then
the maximum DC power dissipation will be close to
546mW, which is slightly higher than the maximum DC
power dissipation of the IC at maximum operating tem-
perature. However, according to the IEEE 802.3af stan-
dard, the duration of the classification mode is limited to
75ms (max). The MAX5941A/MAX5941B handles the
maximum classification power dissipation for the maxi-
mum duration time without sustaining any internal dam-
age. If the PSE violates the IEEE 802.3af standard by
exceeding the 75ms maximum classification duration, it
may cause internal damage to the IC.
PWM Controller
Current-Mode Control
The MAX5941A/MAX5941B offer current-mode control
operation with added features such as leading-edge
blanking with dual internal path that only blanks the
sensed current signal applied to the input of the PWM
comparator. The current-limit comparator monitors the
CS pin at all times and provides cycle-by-cycle current
limit without being blanked. The leading-edge blanking
of the CS signal prevents the PWM comparator from
prematurely terminating the on cycle. The CS signal
contains a leading-edge spike that is the result of the
MOSFET gate charge current, capacitive and diode
reverse recovery current of the power circuit. Since this
leading-edge spike is normally lower than the current
limit comparator threshold, current limiting is not
blanked and cycle-by-cycle current limiting is provided
under all conditions.
Use the MAX5941A in discontinuous flyback applica-
tions where wide line voltage and load current variation
is expected. Use the MAX5941B for single transistor
forward converters where the maximum duty cycle must
be limited to less than 50%.
Under certain conditions, it may be advantageous to
use a forward converter with greater than 50% duty
cycle. For those cases, use the MAX5941A. The large
duty cycle results in much lower operating primary RMS
currents through the MOSFET switch and in most cases
a smaller output filter inductor. The major disadvantage
to this is that the MOSFET voltage rating must be higher
and that slope compensation must be provided to sta-
bilize the inner current loop. The MAX5941A provides
internal slope compensation.
Optocoupled Feedback
Isolated voltage feedback is achieved by using an opto-
coupler and a shunt regulator as shown in Figure 5. The
output voltage set-point accuracy is a function of the
accuracy of the shunt regulator and feedback resistor-
divider tolerance.
Internal Regulators
The internal regulators of the MAX5941A/MAX5941B
enable initial startup without a lossy startup resistor and
regulate the voltage at the output of a tertiary (bias) wind-
ing to provide power for the IC. At startup, V+ is regulat-
ed down to V
CC
to provide bias for the device. The V
DD
regulator then regulates from the output of the tertiary
winding to V
CC
. This architecture allows the tertiary wind-
ing to have only a small filter capacitor at its output thus
eliminating the additional cost of a filter inductor.
When designing the tertiary winding, calculate the num-
ber of turns so the minimum reflected voltage is always
higher than 12.7V. The maximum reflected voltage must
be less than 36V.
To reduce power dissipation, the high-voltage regulator
is disabled when the V
DD
voltage reaches 12.7V. This
greatly reduces power dissipation and improves effi-
ciency. If V
CC
falls below the undervoltage lockout
threshold (V
CC
= 6.6V), the low-voltage regulator is dis-
abled, and soft-start is reinitiated. In undervoltage lock-
out the MOSFET driver output (NDRV) is held low.
If the input voltage range is between 13V and 36V, V+
and V
DD
may be connected to the line voltage provided
that the maximum power dissipation is not exceeded.
This eliminates the need for a tertiary winding.
PWM Controller Undervoltage Lockout,
Soft-Start, and Shutdown
The soft-start feature of the MAX5941A/MAX5941B
allows the load voltage to ramp up in a controlled man-
ner, thus eliminating output voltage overshoot.
While the controller is in undervoltage lockout, the
capacitor connected to the SS_SHDN pin is dis-
charged. Upon coming out of undervoltage lockout, an
internal current source starts charging the capacitor to
initiate the soft-start cycle. Use the following equation to
calculate total soft-start time:
where C
SS
is the soft-start capacitor as shown in Figure 5.
Operation begins when V
SS_SHDN
ramps above 0.6V.
When soft-start has completed, V
SS_SHDN
is regulated
t
ms
C
startup ss
045.
nF
MAX5941A/MAX5941B
IEEE 802.3af-Compliant Power-Over-Ethernet
Interface/PWM Controller for Power Devices
______________________________________________________________________________________ 15
HIGH-
VOLTAGE
REGULATOR
IN
EN
OUT
BIAS
WINDING
REGULATOR
IN
EN
OUT
SLOPE
COMPENSATION
26mV/µs
275kHz
OSCILLATOR
70ns
BLANKING
R
S
Q
80%/50%
DUTY CYCLE
CLAMP
ILIM
BUF
UVLO
V-
V+
V
DD
OPTO
SS_SHDN
PWM
V
DD-OK
V
CC
NDRV
CS
Vb
4µA
3R
R
5k
2.4V
6.6V
0.7V
125mV
0.4V
26mV/µs
MAX5941A ONLY
Figure 4. MAX5941A/MAX5941B PWM Controller Functional Diagram

MAX5941ACSE+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Power Switch ICs - POE / LAN IEEE 802.3af POE Int/PWM Controller
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union