MAX5941A/MAX5941B
IEEE 802.3af-Compliant Power-Over-Ethernet
Interface/PWM Controller for Power Devices
10 ______________________________________________________________________________________
MAX5941A/MAX5941B
Pin Description
PIN
NAME
FUNCTION
1V+
H i g h- V ol tag e S tar tup Inp ut. Refer enced to V - . C onnect d i r ectl y to an i np ut vol tag e r ang e b etw een 18V to 67V .
C onnects i nter nal l y to a hi g h- vol tag e l i near r eg ul ator that g ener ates V
C C
d ur i ng star tup . Ti e V + to GN D .
2V
DD
Line Regulator Input. Referenced to V-. V
DD
is the input to the linear regulator that generates V
CC
. For
supply voltages less than 36V, connect V
DD
and V+ to the supply. For supply voltages greater than 36V,
V
DD
receives its power from the tertiary winding of the transformer and accepts voltages from 13V to 36V.
Bypass V
DD
to V- with a 4.7µF capacitor.
3 OPTO Optocoupler Input. Referenced to V-. The control voltage range on this input is 2V to 3V.
4
SS_SHDN
Soft-Start Timing Capacitor Connection. Referenced to V-. Ramp time to full current limit is approximately
0.45ms/nF. Bypass with a minimum 10nF capacitor to V-. A 2.4V reference voltage appears across the
capacitor. Disable the PWM controller by pulling SS_SHDN
below 0.25V. Tie to PGOOD to enable PWM
controller automatically from the PD interface.
5 UVLO
Undervoltage Lockout Programming Input for Power Mode. Referenced to V
EE
. When UVLO is above its
threshold, the device enters the power mode. Connect UVLO to V
EE
to use the default undervoltage lockout
threshold. Connect UVLO to an external resistor-divider to define a threshold externally. The series
resistance value of the external resistors must add to 25.5k (±1%) and replaces the detection resistor. To
keep the device in undervoltage lockout, pull UVLO between V
TH,G,UVLO
and V
REF,UVLO
.
6 RCL C l assi fi cati on S etti ng . Refer enced to V
E E
. Ad d a r esi stor fr om RC L to V
E E
to set a P D cl ass ( see Tab l es 1 and 2) .
7 GATE
Gate of Internal N-Channel Power MOSFET. Referenced to V
EE .
GATE sources 10µA when the device
enters the power mode. Connect an external 100V ceramic capacitor from GATE to V
OUT
to program the
inrush current. Pull GATE to V
EE
to turn off the internal MOSFET. The detection and classification functions
operate normally when GATE is pulled to V
EE
.
8V
EE
Negative Input Power. Source of the integrated isolation N-channel power MOSFET. Connect V
EE
to -48V.
9 OUT
Output Voltage. Referenced to V
EE
. Drain of the integrated isolation N-channel power MOSFET. Connect
OUT to V-.
10
PGOOD
Power-Good Indicator Output, Active High, Open Drain. PGOOD is referenced to OUT. PGOOD goes high
impedance when V
OUT
is within 1.2V of V
EE
and when GATE is 5V above V
EE
. Otherwise, PGOOD is pulled
to OUT (given that V
OUT
is at least 5V below GND). Connect PGOOD directly (no external pullup required)
to SS_SHDN to enable/disable the PWM controller.
11
PGOOD
Power-Good Indicator Output, Active Low, Open Drain. PGOOD is referenced to V
EE
. PGOOD is pulled to
V
EE
when V
OUT
is within 1.2V of V
EE
and when GATE is 5V above V
EE
. Otherwise, PGOOD goes high
impedance.
12 GND Ground. Referenced to V
EE
. GND is the positive input power. Connect to V+.
13 CS
Current-Sense Input. Referenced to V-. Turns power switch off if V
CS
rises above 465mV for cycle-by-cycle
current limiting. CS is also the feedback for the current-mode controller. CS connects to the PWM controller
through a leading-edge blanking circuit.
14 V- V- is the ground terminal of the PWM Controller. Connect to OUT.
15 NDRV Gate Drive. Referenced to V-. Drives a high-voltage external N-channel power MOSFET.
16 V
CC
Regulated IC Supply. Referenced to V-. Provides power for MAX5941_. V
CC
is regulated from V
DD
during
normal operation and from V+ during startup. Bypass V
CC
with a 10µF tantalum capacitor in parallel with a
0.1µF ceramic capacitor to V-.
MAX5941A/MAX5941B
IEEE 802.3af-Compliant Power-Over-Ethernet
Interface/PWM Controller for Power Devices
______________________________________________________________________________________ 11
MAX5941A/MAX5941B
CLASS USAGE R
CL
() MAXIMUM POWER USED BY PD (W)
0 Default 10k 0.44 to 12.95
1 Optional 732 0.44 to 3.84
2 Optional 392 3.84 to 6.49
3 Optional 255 6.49 to 12.95
4 Not allowed 178 Reserved*
*Class 4 reserved for future use.
Table 1. PD Power Classification/R
CL
Selection
Detailed Description
The MAX5941A/MAX5941B integrate a complete power
IC for powered devices (PDs) in a power-over-ethernet
(PoE) system. The MAX5941A/MAX5941B provide PD
interface and a compact DC-DC PWM controller suitable
for flyback and forward converters in either isolated or
nonisolated designs.
The MAX5941A/MAX5941B powered device (PD) inter-
face complies with the IEEE 802.3af standard, providing
the PD with a detection signature, a classification signa-
ture, and an integrated isolation switch with programma-
ble inrush current control. These devices also feature
power-mode undervoltage lockout (UVLO) with wide hys-
teresis, and power-good status outputs.
An integrated MOSFET provides PD isolation during
detection and classification. The MAX5941A/MAX5941B
guarantee a leakage current offset of less than 10µA dur-
ing the detection phase. A programmable current limit
prevents high inrush current during power-on. The
devices feature power-mode UVLO with wide hysteresis
and long deglitch time to compensate for twisted-pair
cable resistive drop and to ensure glitch-free transition
between detection, classification, and power-on/off phas-
es. The MAX5941A/MAX5941B provide both active-high
(PGOOD) and active-low (PGOOD) outputs. Both
devices offer an adjustable UVLO threshold with a
default value compliant to the IEEE 802.3af standard.
The MAX5941A/MAX5941B are designed to work with or
without an external diode bridge in front of the PD.
Use the MAX5941A/MAX5941B PWM current-mode con-
trollers to design flyback- or forward-mode power sup-
plies. Current-mode operation simplifies control-loop
design while enhancing loop stability. An internal high-
voltage startup regulator allows the device to connect
directly to the input supply without an external startup
resistor. Current from the internal regulator starts the con-
troller. Once the tertiary winding voltage is established,
the internal regulator is switched off and bias current for
running the PWM controller is derived from the tertiary
winding. The internal oscillator is set to 275kHz and
trimmed to ±10%. This permits the use of small magnetic
components to minimize board space. Both the
MAX5941A and MAX5941B can be used in power sup-
plies providing multiple output voltages. A functional dia-
gram of the PWM controller is shown in Figure 4. Typical
applications circuits for forward and flyback topologies
are shown in Figure 5 and Figure 6, respectively.
Powered Device Interface
Operating Modes
The powered device (PD) front-end section of the
MAX5941A/MAX5941B operates in three different modes:
PD detection signature, PD classification, and PD power,
depending on its input voltage (V
IN
= GND - V
EE
). All
voltage thresholds are designed to operate with or with-
out the optional diode bridge while still complying with
the IEEE 802.3af standard (see Application Circuit 1).
Detection Mode (1.4V V
IN
10.1V)
In detection mode, the power source equipment (PSE)
applies two voltages on V
IN
in the range of 1.4V to
10.1V (1V step minimum), and then records the current
measurements at the two points. The PSE then com-
putes V/I to ensure the presence of the 25.5k sig-
nature resistor. In this mode, most of the MAX5941A/
MAX5941B internal circuitry is off and the offset current
is less than 10µA.
If the voltage applied to the PD is reversed, install pro-
tection diodes on the input terminal to prevent internal
damage to the MAX5941A/MAX5941B (see Figure 7).
Since the PSE uses a slope technique (V/I) to calcu-
late the signature resistance, the DC offset due to the
protection diodes is subtracted and does not affect the
detection process.
Classification Mode (12.6V V
IN
20V)
In the classification mode, the PSE classifies the PD
based on the power consumption required by the PD.
This allows the PSE to efficiently manage power distribu-
tion. The IEEE 802.3af standard defines five different
classes as shown in Table 1. An external resistor (R
CL
)
connected from RCL to V
EE
sets the classification current.
MAX5941A/MAX5941B
IEEE 802.3af-Compliant Power-Over-Ethernet
Interface/PWM Controller for Power Devices
12 ______________________________________________________________________________________
MAX5941A/MAX5941B
R1
21.8V
39V
GND
UVLO
GND
UVLO
GATE
R2
R3
MAX5941B
CLASSIFICATION
RCL
PGOOD
6.8V
EN
REF
2.4V, 0.8
HYST
2.4V,
REF
200mV
V
EE
V
GATE
, 6V
1.2V, REF
5V, REF
Q4
PGOOD
OUT
Q3
Q1
Q2
EN
Figure 2. Powered Device Interface Block Diagram
CLASS CURRENT SEEN AT V
IN
(mA)
IEEE 802.3af PD CLASSIFICATION
CURRENT SPECIFICATION (mA)
CLASS R
CL
()V
IN
* (V)
MIN MAX MIN MAX
0 10k
12.6 to 20
0404
1 732
12.6 to 20
912912
2 392
12.6 to 20
17 20 17 20
3 255
12.6 to 20
26 30 26 30
4 178
12.6 to 20
36 42 36 44
*V
IN
is measured across the MAX5941 input pins (V
EE
and GND), which does not include the diode bridge voltage drop.
Table 2. Setting Classification Current

MAX5941BESE+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Power Switch ICs - POE / LAN IEEE 802.3af POE Int/PWM Controller
Lifecycle:
New from this manufacturer.
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