www.fairchildsemi.com 10
74F433
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Storage Temperature 65°C to +150°C
Ambient Temperature under Bias 55°C to +125°C
Junction Temperature under Bias 55°C to +150°C
V
CC
Pin Potential to
Ground Pin 0.5V to +7.0V
Input Voltage (Note 2) 0.5V to +7.0V
Input Current (Note 2) 30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with V
CC
= 0V)
Standard Output 0.5V to V
CC
3-STATE Output 0.5V to +5.5V
Current Applied to Output
in LOW State (Max) twice the rated I
OL
(mA)
Free Air Ambient Temperature 0°C to +70°C
Supply Voltage +4.5V to +5.5V
Symbol Parameter Min Typ Max Units
V
CC
Conditions
V
IH
Input HIGH Voltage 2.0 V Recognized as a HIGH Signal
V
IL
Input LOW Voltage 0.8 V Recognized as a LOW Signal
V
CD
Input Clamp Diode Voltage 1.5 V Min I
IN
= 18 mA
V
OH
Output HIGH 10% V
CC
2.4
VMin
I
OH
= 400 µA (ORE, IRF)
Voltage 10% V
CC
2.4 I
OH
= 5.7 mA (Q
n
, Q
s
)
5% V
CC
2.7 I
OH
= 400 µA (ORE, IRF)
5% V
CC
2.7 I
OH
= 5.7 mA (Q
n
, Q
s
)
V
OL
Output LOW Voltage 10% V
CC
0.50 V Min I
OL
= 16 mA (Q
n
, Q
s
)
I
IH
Input HIGH Current 5.0 µAMaxV
IN
= 2.7V
I
BVI
Input HIGH Current
7.0 µAMax
V
IN
= 7.0V
Breakdown Test
I
CEX
Output HIGH
50 µAMax
V
OUT
= V
CC
Leakage Current
V
ID
Input Leakage
4.75 V 0.0
I
ID
= 1.9 µA
Test All Other Pins Grounded
I
OD
Output Leakage
3.75 µA0.0
V
IOD
= 150 mV
Circuit Current All Other Pins Grounded
I
IL
Input LOW Current 0.4 mA Max V
IN
= 0.5V
I
OZH
Output Leakage Current 50 µAMaxV
OUT
= 2.7V (Q
n
, Q
s
)
I
OZL
Output Leakage Current 50 µAMaxV
OUT
= 0.5V (Q
n
, Q
s
)
I
OS
Output Short-Circuit Current 20 130 mA Max V
OUT
= 0V
I
CC
Power Supply Current 150 215 mA Max
11 www.fairchildsemi.com
74F433
AC Electrical Characteristics
Symbol Parameter
T
A
= +25°CT
A
= 0°C to +70°C
Units
Figure
Number
V
CC
= +5.0V V
CC
= +5.0V
C
L
= 50 pF C
L
= 50 pF
Min Max Min Max
t
PHL
Propagation Delay, Negative-Going
2.0 17.0 2.0 18.0
ns
Figure 11
Figure 12
CPSI to IRF Output
t
PLH
Propagation Delay,
9.0 34.0 8.0 38.0
Negative-Going TTS to IRF
t
PLH
Propagation Delay, Negative-Going 4.0 25.0 3.0 27.0
ns
Figure 13
Figure 14
t
PHL
CPSO to Q
S
Output 5.0 20.0 5.0 21.0
t
PLH
Propagation Delay, Positive-Going 8.0 35.0 7.0 38.0
ns Figure 15
t
PHL
TOP to Q
0
–Q
3
Outputs 7.0 30.0 7.0 32.0
t
PHL
Propagation Delay,
7.0 25.0 6.0 28.0 ns
Figure 13
Figure 14
Negative-Going CPSO to ORE
t
PHL
Propagation Delay,
6.0 26.0 6.0 28.0
ns Figure 15
Negative-Going TOP to ORE
t
PLH
Propagation Delay, Positive-Going
13.0 48.0 12.0 51.0
TOP to ORE
t
PLH
Propagation Delay, Negative-Going
13.0 45.0 12.0 50.0 ns
Figure 13
Figure 14
TOS to Positive-Going ORE
t
PHL
Propagation Delay, Positive-
4.0 22.0 4.0 23.0
ns
Figure 17
Figure 18
Going PL to Negative-Going IRF
t
PLH
Propagation Delay, Negative-
7.0 31.0 6.0 35.0
Going PL to Positive-Going IRF
t
PLH
Propagation Delay,
9.0 38.0 8.0 44.0 ns
Positive-Going OES to ORE
t
PLH
Propagation Delay Positive-IRF
5.0 25.0 5.0 27.0 ns Figure 18
Going IES to Positive-Going
t
PHL
Propagation Delay
7.0 28.0 7.0 31.0 ns
MR to ORE
t
PLH
Propagation Delay
5.0 27.0 5.0 30.0 ns
MR to IRF
t
PZH
Enable Time 1.0 16.0 1.0 18.0
ns
t
PZL
OE to Q
0
–Q
3
1.0 14.0 1.0 16.0
t
PHZ
Disable Time 1.0 10.0 1.0 12.0
t
PLZ
OE to Q
0
–Q
3
1.0 23.0 1.0 30.0
t
PZH
Enable Time 1.0 10.0 1.0 12.0
ns
t
PZL
Negative-Going OES to Q
S
1.0 14.0 1.0 15.0
t
PHZ
Disable Time 1.0 10.0 1.0 12.0
t
PLZ
Negative-Going OES to Q
S
1.0 14.0 1.0 16.0
t
PZH
Enable Time 1.0 35.0 1.0 42.0
ns
t
PZL
TOS to Q
S
1.0 35.0 1.0 39.0
t
DFT
Fall-Through Time 0.2 0.9 0.2 1.0 ns Figure 16
t
AP
Parallel Appearance Time
20.0 2.0 20.0 2.0
ns
ORE to Q
0
–Q
3
t
AS
Serial Appearance Time
20.0 5.0 20.0 5.0
ORE to Q
S
www.fairchildsemi.com 12
74F433
AC Operating Requirements
Symbol Parameter
T
A
= +25°CT
A
= 0°C to +70°C
Units
Figure
Number
V
CC
= +5.0V
V
CC
= +5.0V
Min Max Min Max
t
S
(H) Setup Time, HIGH or LOW 7.0 7.0
ns
Figure 11
Figure 12
t
S
(L) D
S
to Negative CPSI 7.0 7.0
t
H
(H) Hold Time, HIGH or LOW 2.0 2.0
t
H
(L) D
S
to CPSI 2.0 2.0
t
S
(L) Setup Time, LOW TTS to IRF,
0.0 0.0 ns
Figure 11
Figure 12
Figure 17
Figure 18
Serial or Parallel Mode
t
S
(L) Setup Time, LOW Negative-Going
0.0 0.0 ns
Figure 13
Figure 14
ORE to Negative-Going TOS
t
S
(L) Setup Time, LOW Negative-Going
8.0 9.0
ns Figure 12
IES to CPSI
t
S
(L) Setup Time, LOW Negative-Going
30.0 33.0
TTS to CPSI
t
S
(H) Setup Time, HIGH or LOW 0.0 0.0 ns
t
S
(L) Parallel Inputs to PL 0.0 0.0
t
H
(H) Hold Time, HIGH or LOW 4.0 4.0
t
H
(L) Parallel Inputs to PL 4.0 4.0
t
W
(H) CPSI Pulse Width 10.0 11.0
ns
Figure 11
Figure 12
t
W
(L) HIGH or LOW 5.0 6.0
t
W
(H) PL Pulse Width, HIGH 7.0 9.0 ns Figure 17
Figure 18
t
W
(L)
TTS Pulse Width, LOW
7.0 9.0 ns
Figure 11
Figure 12
Figure 13
Figure 14
Serial or Parallel Mode
t
W
(L) MR Pulse Width, LOW 7.0 9.0 ns Figure 16
t
W
(H) TOP Pulse Width 14.0 16.0
ns Figure 15
t
W
(L) HIGH or LOW 7.0 7.0
t
W
(H) CPSO Pulse Width 14.0 16.0
ns
Figure 13
Figure 14
t
W
(L) HIGH or LOW 7.0 7.0
t
REC
Recovery Time
8.0 15.0 ns Figure 16
MR to Any Input

74F433SPC

Mfr. #:
Manufacturer:
ON Semiconductor / Fairchild
Description:
Registers 64x4 FIFO Buffer Mem
Lifecycle:
New from this manufacturer.
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