LTC4076
13
4076fa
Power Dissipation
When designing the battery charger circuit, it is not neces-
sary to design for worst-case power dissipation scenarios
because the LTC4076 automatically reduces the charge
current during high power conditions. The conditions
that cause the LTC4076 to reduce charge current through
thermal feedback can be approximated by considering the
power dissipated in the IC. Most of the power dissipation
is generated from the internal MOSFET pass device. Thus,
the power dissipation is calculated to be:
P
D
= (V
IN
– V
BAT
) • I
BAT
P
D
is the power dissipated, V
IN
is the input supply volt-
age (either DCIN or USBIN), V
BAT
is the battery voltage
and I
BAT
is the charge current. The approximate ambient
temperature at which the thermal feedback begins to
protect the IC is:
T
A
= 105°C – P
D
θ
JA
T
A
= 105°C – (V
IN
– V
BAT
) • I
BAT
θ
JA
Example: An LTC4076 operating from a 5V wall adapter (on
the DCIN input) is programmed to supply 800mA full-scale
current to a discharged Li-Ion battery with a voltage of 3.3V.
Assuming θ
JA
is 40°C/W (see Thermal Considerations),
the ambient temperature at which the LTC4076 will begin
to reduce the charge current is approximately:
T
A
= 105°C – (5V – 3.3V) • (800mA) • 40°C/W
T
A
= 105°C – 1.36W • 40°C/W = 105°C – 54.4°C
T
A
= 50.6°C
The LTC4076 can be used above 50.6°C ambient, but
the charge current will be reduced from 800mA. The ap-
proximate current at a given ambient temperature can be
approximated by:
I
C T
V V
BAT
A
IN BAT JA
=
°105
(
)
θ
Using the previous example with an ambient temperature
of 60°C, the charge current will be reduced to approxi-
mately:
I
C C
V V C W
C
C A
I m
A
BAT
BAT
=
° °
°
=
°
°
=
105 60
5 3
3 4
0
45
68
662
(
. )
/
/
It is important to remember that LTC4076 applications do
not need to be designed for worst-case thermal conditions,
since the IC will automatically reduce power dissipation
when the junction temperature reaches approximately
105°C.
Thermal Considerations
In order to deliver maximum charge current under all
conditions, it is critical that the exposed metal pad on the
backside of the LTC4076 package is properly soldered
to the PC board ground. When correctly soldered to a
2500mm
2
double sided 1oz copper board, the LTC4076
has a thermal resistance of approximately 40°C/W. Failure
to make thermal contact between the exposed pad on the
backside of the package and the copper board will result in
thermal resistances far greater than 40°C/W. As an example,
a correctly soldered LTC4076 can deliver over 800mA to
a battery from a 5V supply at room temperature. Without
a good backside thermal connection, this number would
drop to much less than 500mA.
APPLICATIO S I FOR ATIO
W UU
U
LTC4076
14
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Figure 4. Low Loss Input Reverse Polarity Protection
Protecting the USB Pin and Wall Adapter Input from
Overvoltage Transients
Caution must be exercised when using ceramic capacitors
to bypass the USBIN pin or the wall adapter inputs. High
voltage transients can be generated when the USB or wall
adapter is hot plugged. When power is supplied via the
USB bus or wall adapter, the cable inductance along with
the self resonant and high Q characteristics of ceramic
capacitors can cause substantial ringing which could
exceed the maximum voltage ratings and damage the
LTC4076. Refer to Linear Technology Application Note 88,
entitled “Ceramic Input Capacitors Can Cause Overvoltage
Transients” for a detailed discussion of this problem.
APPLICATIO S I FOR ATIO
W UU
U
Always use an oscilloscope to check the voltage wave-
forms at the USBIN and DCIN pins during USB and wall
adapter hot-plug events to ensure that overvoltage
transients have been adequately removed.
Reverse Polarity Input Voltage Protection
In some applications, protection from reverse polarity
voltage on the input supply pins is desired. If the sup-
ply voltage is high enough, a series blocking diode can
be used. In other cases where the voltage drop must be
kept low, a P-channel MOSFET can be used (as shown in
Figure 4).
WALL
ADAPTER
DCIN
LTC4076
DRAIN-BULK
DIODE OF FET
4076 F04
LTC4076
15
4076fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTIO
U
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699)
3.00 ±0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.38 ± 0.10
BOTTOM VIEW—EXPOSED PAD
1.65 ± 0.10
(2 SIDES)
0.75 ±0.05
R = 0.115
TYP
2.38 ±0.10
(2 SIDES)
15
106
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
(DD) DFN 1103
0.25 ± 0.05
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.65 ±0.05
(2 SIDES)
2.15 ±0.05
0.50
BSC
0.675 ±0.05
3.50 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC

LTC4076EDD#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Battery Management Dual Input Linear Li-Ion Battery Charger
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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