PS4066ACSDE

4
PS8184A 10/15/98
PS4066/PS4066A
Low-Cost, Quad, SPST, CMOS Analog Switches
Electrical Specifications - Single +5V Supply
(V+ = +5V ±10%, GND = 0V, V
INH
= 2.4V, V
INL
= 0.8V)
retemaraPlobmySsnoitidnoC)C°(pmeTniM
)1(
pyT
)2(
xaM
)1(
stinU
hctiwSgolanA
egnaRlangiSgolanA
)3(
V
GOLANA
lluF0 +VV
ecnatsiseR-nOR
NO
I,V5.4=+V
MOC
,Am1-=
V
ON
V5.3=
522257
Ω
lluF001
ecnatsiseR-nO
slennahCneewteBhctaM
)4(
ΔR
NO
I,V5=+V
MOC
,Am1-=
V
ON
V3=
523.04
lluF21
ssentalFecnatsiseR-nO
)5,3(
R
)NO(TALF
I,V5=+V
MOC
,Am1-=
V
ON
V3,V1=
5246
lluF8
egakaeLffOON
tnerruC
)9(
I
)FFO(ON
V,V5.5=+V
MOC
,V0=
V
ON
V5.4=
6604SP
A6604SP
52
1-
1.0-
1
1.0
An
lluF6-6
egakaeLffOMOC
nerruC
)9(
I
)FFO(MOC
V,V5.5=+V
MOC
,V0=
V
ON
V5.4=
6604SP
A6604SP
52
1-
1.0-
1
1.0
lluF6-6
egakaeLnOMOC
tnerruC
)6(
I
)NO(MOC
V,V5.5=+V
MOC
V5=
V
ON
V5.4=
6604SP
A6604SP
52
2-
2.0-
2
2.0
lluF21-21
cimanyD
emiTnO-nruTt
NO
V
ON
V3=
5256521
sn
lluF571
emiTffO-nruTt
FFO
520357
lluF521
htdiwdnaBlennahC-nOWB
05,mBd0=langiS Ω tuodnani
4erugiF
52001MHz
noitcejnIegrahC
)3(
Q
C
L
V,Fn1=
NEG
,V0=
R
NEG
=
3erugiF,V0
52101Cp
ylppuS
tnerruCylppuSevitisoP+I
V,V5.5=+V
NI
,+VroV0=
fforonoslennahclla
lluF1-1
μA
5
PS8184A 10/15/98
PS4066/PS4066A
Low-Cost, Quad, SPST, CMOS Analog Switches
Electrical Specifications - Single +3V Supply
(V+ = +2.7V to 3.3V, GND = 0V, V
I
NH
= 2.4V, V
INL
= 0.8V)
retemaraPlobmySsnoitidnoCC°pmeT.niM
)1(
pyT
)2(
.xaM
)1(
stinU
hctiwSgolanA
egnaRlangiSgolanA
)3(
V
GOLANA
0+VV
ecnatsiseR-nOlennahCR
NO
I,V3=+V
MOC
,Am1-=
V
ON
V5.1=
52071
Ω
lluF522
cimanyD
emiT-nO-nruT
)3(
t
NO
V,V3=+V
ON
V5.1=
5208581
sn
lluF032
emiT-ffO-nruT
)3(
t
)FFO(
V,V3=+V
ON
V5.1=
5204051
lluF002
noitcejnIegrahC
)3(
Q
C
L
V,Fn1=
NEG
,V0=
R
NEG
V0=
52201Cp
ylppuS
tnerruCylppuSevitisoP+I
V,V3.3=+V
NI
,+VroV0=
fforonoslennahclla
lluF1-100.01
μA
Notes:
1. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in
this data sheet.
2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing.
3. Guaranteed by design
4. ΔR
ΟΝ
=
ΔR
ΟΝ
max - ΔR
ΟΝ
min
5. Flatness is defined as the difference between the maximum and minimum value of on-resistance measured.
6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC.
7. Off Isolation = 20log
10
[ V
COM
/ (V
NO
or V
NO
) ], V
COM
= 0utput, V
NC
/V
NO
= input to off switch
8. Between any two switches.
6
PS8184A 10/15/98
PS4066/PS4066A
Low-Cost, Quad, SPST, CMOS Analog Switches
Typical Operating Characteristics (TA = +25°C, unless otherwise noted)
R
ON
vs. V
COM
& Temperature
R
ON
vs. V
COM
& Supply Voltages
Charge Injection vs. Analog Voltage
Leakage Currents vs. V
COM

PS4066ACSDE

Mfr. #:
Manufacturer:
Description:
IC QUAD SPST ANALOG SW 14-SOIC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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