LTC1165CS8#TRPBF

4
LTC1163/LTC1165
CCHARA TERIST
ICS
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PI FU CTIO S
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Input Pins
The LTC1163 is noninverting; i.e., the MOSFET gate is
driven above the supply when the input pin is held high.
The LTC1165 is inverting and drives the MOSFET gate high
when the input pin is held low. The inverting inputs of the
LTC1165 allow P-channel switches to be replaced by
lower resistance/cost N-channel switches while maintain-
ing system drive polarity.
The LTC1163/LTC1165 logic inputs are high impedance
CMOS gates with ESD protection diodes to ground and
therefore should not be forced below ground. The inputs
can however, be driven above the power supply rail as
there are no clamping diodes connected between the input
pins and supply pin. This facilitates operation in mixed
5V/3V systems.
Output Pins
The output pin is either driven to ground when the switch
is turned OFF or driven above the supply rail when the
switch is turned ON. The output is clamped to about 14V
above ground by a built-in Zener clamp. This pin has a
relatively high impedance when driven above the rail (the
equivalent of a few hundred k). Care should be taken to
minimize any loading of this pin by parasitic resistance to
ground or supply.
Supply Pin
A 150 resistor should be inserted in series with the
ground pin or supply pin if negative supply voltage tran-
sients are anticipated. This will limit the current flowing
from the power source into the LTC1163/LTC1165 to tens
of milliamps during reverse battery conditions.
OPERATIO
U
The LTC1163/LTC1165 are triple micropower MOSFET
drivers designed for operation over the 1.8V to 6V supply
range and include the following functional blocks:
3V Logic Compatible Inputs
The LTC1163/LTC1165 inputs have been designed to
accommodate a wide range of 3V and 5V logic families.
The input threshold voltage is set at roughly 50% of the
supply voltage and approximately 200mV of input hyster-
esis is provided to ensure clean switching.
The input enables all of the following circuit blocks: the
bias generator, the high frequency oscillator and gate
charge pump. Therefore, when the input is turned off, the
entire circuit powers down and the supply current drops
below 1µA.
Standby Supply Current
TEMPERATURE (°C)
0
SUPPLY CURRENT (µA)
5
4
3
2
1
0
–1
10 20 30 40
LTC1163/65 • TPC07
50 60 70
MOSFET Gate Drive Current
GATE VOLTAGE ABOVE SUPPLY (V)
1
GATE DRIVE CURRENT (µA)
10
100
1000
0468
0.1
2
10
LTC1163/65 • TPC09
V
S
= 5V
V
S
= 3.3V
V
S
= 2.2VV
S
= 1.8V
T
A
= 25°C
Supply Current per Driver ON
TEMPERATURE (°C)
0
SUPPLY CURRENT (µA)
300
250
200
150
100
50
0
10 20 30 40
LTC1163/65 • TPC08
50 60 70
V
S
= 5V
V
S
= 3.3V
V
S
= 1.8V
5
LTC1163/LTC1165
OPERATIO
U
Gate Charge Pump
Gate drive for the power MOSFET is produced by an
internal charge pump circuit which generates a gate volt-
age substantially higher than the power supply voltage.
The charge pump capacitors are included on chip and
therefore no external components are required to generate
gate drive.
Controlled Gate Rise and Fall Times
When the input is switched ON and OFF, the gate is
charged by the internal charge pump and discharged in a
controlled manner. The charge and discharge rates have
been set to minimize RFI and EMI emissions.
BLOCK DIAGRA
W
(One Channel)
APPLICATIO S I FOR ATIO
W
U
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Logic-Level MOSFET Switches
The LTC1163/LTC1165 are designed to operate with
logic-level N-channel MOSFET switches. Although there
is some variation among manufacturers, logic-level
MOSFET switches are typically rated with V
GS
= 4V with
a maximum continuous V
GS
rating of ±10V. R
DS(ON)
and
maximum V
DS
ratings are similar to standard MOSFETs
and there is generally little price differential. Logic-level
MOSFETs are frequently designated by an “L” and are
usually available in surface mount packaging. Some
logic-level MOSFETs are rated with V
GS
up to ±15V and
can be used in applications which require operation over
the entire 1.8V to 6V range.
Powering Large Capacitive Loads
Electrical subsystems in portable battery-powered equip-
ment are typically bypassed with large filter capacitors to
reduce supply transients and supply induced glitching. If
not properly powered however, these capacitors may
themselves become the source of supply glitching.
For example, if a 100µF capacitor is powered through a
switch with a slew rate of 0.1V/µs, the current during start-
up is:
I
START
= C(V/t)
= (100 × 10
–6
)(1 × 10
5
)
= 10A
Obviously, this is too much current for the regulator (or
output capacitor) to supply and the output will glitch by as
much as a few volts.
The startup current can be substantially reduced by limit-
ing the slew rate at the gate of an N-channel as shown in
Figure 1. The gate drive output of the LTC1163/LTC1165
is passed through a simple RC network, R1 and C1, which
substantially slows the slew rate of the MOSFET gate to
approximately 1.5 × 10
–4
V/µs. Since the MOSFET is
operating as a source follower, the slew rate at the source
is essentially the same as that at the gate, reducing the
startup current to approximately 15mA which is easily
LTC1163
LTC1165
LTC1163/65 • BD
GATE
DISCHARGE
LOGIC
CHARGE
PUMP
BIAS
GENERATOR
HIGH
FREQUENCY
OSCILLATOR
GATE
14V
INPUT
6
LTC1163/LTC1165
APPLICATIO S I FOR ATIO
W
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Figure 1. Powering a Large Capacitive Load
on a 3.3V supply which is compatible with 5V TTL and
CMOS logic. (The LTC1163/LTC1165 cannot however, be
driven by 3V logic when powered from a 5V supply
because the threshold is approximately 2.5V.)
TYPICAL APPLICATIO S
U
PCMCIA Card 3.3V/5V V
CC
Switch
V
S
LTC1165
OUT1
OUT2
OUT3
GND
IN1
IN2
IN3
V
CC
5V
V
CC
3V
PCMCIA
CONTROLLER
+
10µF
5V
PC
CARD
SOCKET
MMDF3N02HD
+
1µF
1/2 MMDF3N02HD
V
CC
3.3V
LTC1163/65 • TA03
NOTE: USE LTC1163 WITH NONINVERTING PCMCIA CONTROLLERS
managed by the system regulator. R2 is required to
eliminate the possibility of parasitic MOSFET oscillations
during switch transitions. It is a good practice to isolate the
gates of paralleled MOSFETs with 1k resistors to decrease
the possibility of interaction between switches.
Mixed 5V/3V Systems
Because the input ESD protection diodes are referenced to
ground instead of the supply pin, it is possible to drive the
LTC1163/LTC1165 inputs from 5V CMOS or TTL logic
even though the LTC1163/LTC1165 are powered from a
3.3V supply as shown in Figure 2. The input threshold
voltage is approximately 50% of the supply voltage or 1.6V
Reverse Battery Protection
The LTC1163/LTC1165 can be protected against reverse
battery conditions by connecting a 150 resistor in series
with the ground pin or supply pin. The resistor limits the
supply current to less than 24mA with –3.6V applied.
Because the LTC1163/LTC1165 draw very little current
while in normal operation, the drop across the resistor is
minimal. The 3.3V µP (or control logic) can be protected by
adding 10k resistors in series with the input pins.
Figure 2. Direct Interface to 5V Logic
V
S
1/3 LTC1163
OUT1
GND
IN1
ON/OFF
R1
100k
R2
1k
C1
0.1µF
3.3V
LOAD
+
C
L
100µF
V
IN
LT1129-3.3
3.3µF
+
MTD3055EL
3.3V
LTC1163/65 • F01
V
S
1/3 LTC1163
OUT1
GND
IN1
3.3V
LOAD
3.3V
MTD3055EL
LTC1163/65 • F01
5V

LTC1165CS8#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Gate Drivers Triple High Side Switch Driver
Lifecycle:
New from this manufacturer.
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