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MC10EP131FAR2

P1-P3P4-P6P7-P9P10-P11
MC10EP131, MC100EP131
http://onsemi.com
7
Table 11. AC CHARACTERISTICS V
CC
= 0 V; V
EE
= −3.0 V to −5.5 V or V
CC
= 3.0 V to 5.5 V; V
EE
= 0 V (Note 20)
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
f
max
Maximum Frequency
(See Figure 4. Frequency vs. V
OUTpp
and JITTER)
> 3 > 3 > 3 GHz
t
PLH
,
t
PHL
Propagation Delay to C
0−3
Output Differential C
C
R
0−3
SET
320
320
320
300
450
450
430
430
520
520
520
550
380
400
380
380
460
500
480
460
580
600
580
580
450
450
450
400
560
560
560
530
650
650
700
650
ps
t
RR
Set/R0−3 Recovery 290 210 290 210 350 280 ps
t
S
t
H
Setup Time
Hold Time
120 80 120 80 120 80 ps
t
PW
Minimum Pulse Rate SET,
R
0−3
550 400 550 400 550 400
t
JITTER
Cycle−to−Cycle Jitter
(See Figure 4. Frequency vs. V
OUTpp
and JITTER)
0.2 < 1 0.2 < 1 0.2 < 1 ps
t
r
t
f
Output Rise/Fall Times Q, Q
(20% − 80%)
110 180 250 125 200 275 150 230 300 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
20.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to V
CC
− 2.0 V.
MC10EP131, MC100EP131
http://onsemi.com
8
0
100
200
300
400
500
600
700
800
0 1000 2000 3000 4000 5000 6000
Figure 4. Frequency vs. V
OUTpp
and JITTER
FREQUENCY (MHz)
1
2
3
4
5
6
7
8
(JITTER)
V
OUTpp
(mV)
JITTER
OUT
ps (RMS)
Figure 5. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
Driver
Device
Receiver
Device
QD
Q D
Z
o
= 50 W
Z
o
= 50 W
50 W 50 W
V
TT
V
TT
= V
CC
− 2.0 V
MC10EP131, MC100EP131
http://onsemi.com
9
ORDERING INFORMATION
Device Package Shipping
†
MC10EP131FA LQFP−32 250 Units / Tray
MC10EP131FAG LQFP−32
(Pb−Free)
250 Units / Tray
MC10EP131FAR2 LQFP−32 2000 / Tape & Reel
MC10EP131FAR2G LQFP−32
(Pb−Free)
2000 / Tape & Reel
MC100EP131FA LQFP−32 250 Units / Tray
MC100EP131FAG LQFP−32
(Pb−Free)
250 Units / Tray
MC100EP131FAR2 LQFP−32 2000 / Tape & Reel
MC100EP131FAR2G LQFP−32
(Pb−Free)
2000 / Tape & Reel
MC10EP131MNG
QFN−32
(Pb−Free)
74 Units / Tray
MC10EP131MNR4G 1000 / Tape & Reel
MC100EP131MNG 74 Units / Tray
MC100EP131MNR4G 1000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D − ECL Clock Distribution Techniques
AN1406/D − Designing with PECL (ECL at +5.0 V)
AN1503/D −
ECLinPSt I/O SPiCE Modeling Kit
AN1504/D − Metastability and the ECLinPS Family
AN1568/D − Interfacing Between LVDS and ECL
AN1672/D − The ECL Translator Guide
AND8001/D − Odd Number Counters Design
AND8002/D − Marking and Date Codes
AND8020/D − Termination of ECL Logic Devices
AND8066/D − Interfacing with ECLinPS
AND8090/D − AC Characteristics of ECL Devices
P1-P3P4-P6P7-P9P10-P11

MC10EP131FAR2

Mfr. #:
Buy MC10EP131FAR2
Manufacturer:
ON Semiconductor
Description:
Flip Flops 3.3V/5V ECL Quad
Lifecycle:
New from this manufacturer.
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