© Semiconductor Components Industries, LLC, 2011
November, 2011 Rev. 3
1 Publication Order Number:
CAT15008/D
CAT15008, CAT15016
Voltage Supervisor with
8-Kb and 16-Kb SPI Serial
CMOS EEPROM
Description
The CAT15008/16 (see table below) are memory and supervisory
solutions for microcontroller based systems. A CMOS serial
EEPROM memory and a system power supervisor with brownout
protection are integrated together. Memory interface is via SPI bus
serial interface.
The CAT15008/16 provides a precision V
CC
sense circuit with two
reset output options: CMOS active low output or CMOS active high.
The RESET output is active whenever V
CC
is below the reset
threshold or falls below the reset threshold voltage.
The power supply monitor and reset circuit protect system
controllers during power up/down and against brownout conditions.
Seven reset threshold voltages support 5 V, 3.3 V, 3 V and 2.5 V
systems. If power supply voltages are out of tolerance reset signals
become active, preventing the system microcontroller, ASIC or
peripherals from operating. Reset signals become inactive typically
240 ms after the supply voltage exceeds the reset threshold level.
Features
Precision Power Supply Voltage Monitor
5 V, 3.3 V, 3 V and 2.5 V Systems
7 Threshold Voltage Options
Active High or Low Reset
Valid Reset Guaranteed at V
CC
= 1 V
10 MHz SPI Compatible
32Byte Page Write Buffer
Low Power CMOS Technology
1,000,000 Program/Erase Cycles
100 Year Data Retention
Industrial Temperature Range
RoHSCompliant 8Pin SOIC Package
These Devices are PbFree, Halogen Free/BFR Free
and are RoHS Compliant
THRESHOLD SUFFIX SELECTOR
Nominal Threshold Voltage Threshold Suffix
Designation
4.63 V L
4.38 V M
4.00 V J
3.08 V T
2.93 V S
2.63 V R
2.32 V Z
ORDERING INFORMATION
http://onsemi.com
SOIC8
CASE 751BD
For Ordering Information details, see page 12.
1
2
3
4
8
7
6
5
CS
SO
WP
V
SS
V
CC
RST/RST
SCK
SI
PIN CONFIGURATION
PIN FUNCTION
Pin Name Function
CS
Chip Select
SO Serial Data Output
WP
Write Protect
V
SS
Ground
SI Serial Data Input
SCK Serial Clock Input
RST/RST
Reset Output
SOIC (W)
MEMORY SIZE SELECTOR
Product Memory Density
15008 8Kbit
15016 16Kbit
V
CC
Power Supply
CAT15008, CAT15016
http://onsemi.com
2
BLOCK DIAGRAM
SO
EEPROM
SCK
SI
CS
WP
V
CC
VOLTAGE
DETECTOR
RST or RST
V
SS
SPECIFICATIONS
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameters Ratings Units
Storage Temperature –65 to +150 °C
Voltage on Any Pin with Respect to Ground (Note 1) 0.5 to +6.5 V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The DC input voltage on any pin should not be lower than 0.5 V or higher than V
CC
+ 0.5 V. During transitions, the voltage on any pin may
undershoot to no less than 1.5 V or overshoot to no more than V
CC
+ 1.5 V, for periods of less than 20 ns.
Table 2. RELIABILITY CHARACTERISTICS (Note 2)
Symbol Parameter Min Units
NEND (Note 3) Endurance 1,000,000 Program/ Erase Cycles
TDR Data Retention 100 Years
2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AECQ100
and JEDEC test methods.
3. Page Mode, V
CC
= 5 V, 25°C
Table 3. D.C. OPERATING CHARACTERISTICS
V
CC
= +2.5 V to +5.5 V, unless otherwise specified.
Symbol
Parameter Test Conditions Min Typ Max Units
I
CC
Supply Current Read or Write at 10 MHz, SO open 2 mA
I
SB
Standby Current
V
CC
< 5.5 V; V
IN
= V
SS
or V
CC
, CS = V
CC
12 25 mA
V
CC
< 3.6 V; V
IN
= V
SS
or V
CC
, CS = V
CC
10 20
I
L
I/O Pin Leakage Pin at GND or V
CC
2
mA
V
IL
Input Low Voltage 0.5 0.3 V
CC
V
V
IH
Input High Voltage 0.7 V
CC
V
CC
+ 0.5 V
V
OL
Output Low Voltage V
CC
2.5 V, I
OL
= 3.0 mA 0.4 V
V
OH
Output High Voltage V
CC
2.5 V, I
OH
= 1.6 mA V
CC
0.8 V
CAT15008, CAT15016
http://onsemi.com
3
Table 4. A.C. CHARACTERISTICS (MEMORY) (Note 1)
V
CC
= 2.5 V to 5.5 V, T
A
= 40°C to 85°C, unless otherwise specified.
Symbol
Parameter Min Max Units
f
SCK
Clock Frequency DC 10 MHz
t
SU
Data Setup Time 20 ns
t
H
Data Hold Time 20 ns
t
WH
SCK High Time 40 ns
t
WL
SCK Low Time 40 ns
t
LZ
HOLD to Output Low Z 25 ns
t
RI
(Note 2) Input Rise Time 2
ms
t
FI
(Note 2) Input Fall Time 2
ms
t
HD
HOLD Setup Time 0 ns
t
CD
HOLD Hold Time 10 ns
t
V
Output Valid from Clock Low 40 ns
t
HO
Output Hold Time 0 ns
t
DIS
Output Disable Time 20 ns
t
HZ
HOLD to Output High Z 25 ns
t
CS
CS High Time 15 ns
t
CSS
CS Setup Time 15 ns
t
CSH
CS Hold Time 15 ns
t
WPS
WP Setup Time 10 ns
t
WPH
WP Hold Time 10 ns
t
WC
(Note 4) Write Cycle Time 5 ms
t
PU
(Notes 2 & 3)
Powerup to Ready Mode 1 ms
1. Test conditions according to “A.C. Test Conditions” table.
2. Tested initially and after a design or process change that affects this parameter.
3. t
PU
is the delay between the time V
CC
is stable and the device is ready to accept commands.
4. t
WC
is the time from the rising edge of CS after a valid write sequence to the end of the internal write cycle.
Table 5. A.C. TEST CONDITIONS
Parameter Test Conditions
Input Rise and Fall Times 10 ns
Input Levels 0.3 V
CC
to 0.7 V
CC
Timing Reference Levels 0.5 V
CC
Output Load Current Source: I
OL
max/ I
OH
max; C
L
= 50 pF

CAT150089SWI-G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Supervisory Circuits w/8k SPI
Lifecycle:
New from this manufacturer.
Delivery:
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