LTC1734
13
1734fa
For more information www.linear.com/LTC1734
applicaTions inForMaTion
V
CC
V
IN
*
1734 F06
LTC1734
*DRAIN-BULK DIODE OF FET
Figure 6. Low Loss Reverse Voltage Protection
Reverse Input Voltage Protection
In some applications, protection from reverse voltage
on V
CC
is desired. If the supply voltage is high enough, a
series blocking diode can be used. In other cases, where
the voltage drop must be kept low, a P-channel FET as
shown in Figure 6 can be used.
V
CC
Bypass Capacitor
Many types of capacitors with values ranging from F to
10µF located close to the LTC1734 will provide adequate
input bypassing. However, caution must be exercised
when using multilayer ceramic capacitors. Because of the
self resonant and high Q characteristics of some types of
ceramic capacitors, high voltage transients can be gener
-
ated under some start-up conditions, such as connecting
the charger input to a hot power source
. To prevent these
transients from exceeding the absolute maximum voltage
rating, several ohms of resistance can be added in series
with the ceramic input capacitor.
Internal Protection
Internal protection is provided to prevent excessive
DRIVE pin currents (I
DSHRT
) and excessive self-heating
of the LTC1734 during a fault condition. The faults can
be generated from a shorted DRIVE pin or from exces
-
sive DRIVE pin current to the base of the external PNP
transistor when its in deep saturation from too low a V
CE
.
This protection is not designed to prevent overheating
of the external pass transistor. Indirectly though, self-
heating of the PNP thermally conducting to the LTC1734
and
resulting in the ICs junction temperature to rise
above 150°C, thus cutting off the PNPs base current.
This action will limit the PNPs junction temperature to
some temperature well above 150°C. The temperature
depends on how well the IC and PNP are thermally
connected and on the transistor’s θ
JA
. See the External
PNP Transistor section for information on protecting the
transistor from overheating.
LTC1734
14
1734fa
For more information www.linear.com/LTC1734
package DescripTion
S6 Package
6-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1636)
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
1.50 – 1.75
(NOTE 4)
2.80 BSC
0.30 – 0.45
6 PLCS (NOTE 3)
DATUM ‘A’
0.09 – 0.20
(NOTE 3)
S6 TSOT-23 0302
2.90 BSC
(NOTE 4)
0.95 BSC
1.90 BSC
0.80 – 0.90
1.00 MAX
0.01 – 0.10
0.20 BSC
0.30 – 0.50 REF
PIN ONE ID
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3.85 MAX
0.62
MAX
0.95
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
S6 Package
6-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1636)
LTC1734
15
1734fa
For more information www.linear.com/LTC1734
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
A 9/15 Revised package drawing and reference. 1, 2, 14

LTC1734ES6-4.1#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Battery Management Lithium-Ion Lin Bat Chr in SOT
Lifecycle:
New from this manufacturer.
Delivery:
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