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whatsoever arising out of the application or use of any product or circuit. The products sold hereunder and any other products sold by Microsemi have been subject to limited testing and should not be used in conjunction
with mission-critical equipment or applications. Any performance specifi cations are believed to be reliable but are not verifi ed, and Buyer must conduct and complete all performance and other testing of the products, alone
and together with, or installed in, any end-products. Buyer shall not rely on any data and performance specifi cations or parameters provided by Microsemi. It is the Buyer’s responsibility to independently determine suitability
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Switch Module
Single
10 GbE
MAC/NIC
10 GbE Line Card or NIC
VSC8489-15
10GBASE-KR
Backplane
1 × 10G
1 × 1G
RXAUI/XAUI
10 GbE
RXAUI/
XAUI
Switch
Module
RXAUI/
XAUI
1
1
1
1
1 × 10G
1 × 1G
VSC8489-15
1
Highlights
• Single port 10 Gbps PHY-only mode
• IEEE 1588v2 compliant
• Confi gurable LAN and WAN support
• RXAUI/XAUI host-side connectivity
• SFP+ I/O with KR support
• 1 Gbps Ethernet mode support
Applications
• Single-port RXAUI/XAUI to SFI/SFP+ line
cards or NICs
• 10GBASE-KR compliant backplane
connections
• Carrier Ethernet and broadband access
networks requiring IEEE 1588v2 timing and
synchronization
• Data center WAN interconnections
• 10 Gbps Ethernet switch cards and router
interface modules
Microsemi's single channel PHY provides support for IEEE 802.3ae
10 Gbps Ethernet and optional IEEE 1588v2, as well as hardware-
based KR operation for single channel Ethernet-based applications.
The single channel VSC8489-15 complements Microsemi's portfolio of
single, dual, and quad channel integrated IEEE 802.1AE MACsec and
IEEE 1588v2 Ethernet PHY transceivers.
VeriTime™ is Microsemi's patent-pending timing technology
that delivers the industry’s most accurate IEEE 1588v2 timing
implementation. The IEEE 1588v2 timing integrated in the PHY is the
quickest, lowest cost method of implementing the timing accuracy that
is crucial for maintaining existing timing-critical capabilities during the
migration from circuit-based to packet-based architectures.
The VSC8489-15 device supports time stamping for 1588 PTP ordinary
clock, boundary clock, and one-step and two-step transparent clock
modes of operation, along with complete Y.1731 OAM performance
monitoring capabilities.
The device meets the SFP+, SR, LR, ER, ZR, direct attach copper,
and OM3 (300 meters) and OM4 (400 meters) multi mode fi ber host
requirements, in accordance with the SFF-8431 specifi cations. It also
compensates for optical impairments for above SFP+ applications,
along with degradations of the PCB.
VSC8489-15 provides KR support, including Clause 72 link training,
Clause 73 backplane autonegotiation, and optional Clause 74 FEC. The
transmit path incorporates a multitap output driver to provide fl exibility
to meet the demanding IEEE 802.3ap 10GBASE-KR Tx output launch
requirements.
The device uses a single 156.25 MHz reference clock for LAN/WAN
operation. Its fl exible clocking options enable Layer 1 support for
Synchronous Ethernet. A complete suite of BIST functionality includes
line and client loopbacks along with pattern generation and error
detection.
VSC8489-15
Single Channel WAN/LAN/Backplane RXAUI/XAUI to SFP+/KR 10 GbE PHY with Optional VeriTime™