MAX15021
Dual, 4A/2A, 4MHz, Step-Down
DC-DC Regulator withTracking/
Sequencing Capability
Maxim Integrated | 19www.maximintegrated.com
The locations of the zeros and poles should be such
that the phase margin peaks around f
CO
.
Set the ratios of f
CO
-to-f
Z
and f
P
-to-f
CO
equal to one anoth-
er, e.g.,
f
CO
= f
P = 5 is a good number to get approximately
f
Z
f
CO
60° of phase margin at f
CO
. Whichever technique, it is
important to place the two zeros at or below the double
pole to avoid the conditional stability issue.
The following procedure is recommended:
1) Select a crossover frequency, f
CO
, at or below one-
tenth the switching frequency (f
SW
):
2) Calculate the LC double-pole frequency, f
LC
:
where C
OUT
is the output capacitor of the regulator.
3) Select the feedback resistor, R
F
, in the range of
3.3kΩ to 30kΩ.
4) Place the compensator’s first
zero at or below the output filter’s
double-pole, f
LC
, as follows:
5) The gain of the modulator (Gain
MOD
)—comprised of
the regulator’s pulse-width modulator, LC filter,
feedback divider, and associated circuitry—at the
crossover frequency is:
The gain of the error amplifier (Gain
E/A
) in midband fre-
quencies is:
The total loop gain is the product of the modulator gain
and the error amplifier gain at f
CO
should be equal to 1,
as follows:
Gain
MOD
x Gain
E/A
= 1
So:
Solving for C
I
:
6) For those situations where f
LC
< f
CO
< f
ESR
< f
SW
/2,
as with low-ESR tantalum capacitors, the compen-
sator’s second pole (f
P2
) should be used to cancel
f
ESR
. This provides additional phase margin. On the
system Bode plot, the loop gain maintains its
+20dB/decade slope up to
1
/
2
of the switching fre-
quency verses flattening out soon after the 0dB
crossover. Then set:
f
P2
= f
ESR
If a ceramic capacitor is used, then the capacitor ESR
zero, f
ESR
, is likely to be located even above one-half of
the switching frequency, that is f
LC
< f
CO
< f
SW
/2 <
f
ESR
. In this case, the frequency of the second pole
(f
P2
) should be placed high enough not to significantly
erode the phase margin at the crossover frequency.
For example, f
P2
can be set at 5 x f
CO
, so that its con-
tribution to phase loss at the crossover frequency f
CO
is
only about 11°:
f
P2
= 5 x f
CO
Once f
P2
is known, calculate R
I
:
7) Place the second zero (f
Z2
) at 0.2 x f
CO
or at f
LC
,
whichever is lower, and calculate R
1
using the fol-
lowing equation:
8) Place the third pole (f
P3
) at 1/2 the switching fre-
quency and calculate C
CF
from:
9) Calculate R
2
as:
where V
FB
= 0.6V (typ).
R[k] R[k]
V [V]
V [V] V [V]
21
FB
OUT_ FB
ΩΩ
C[F]
1
2 0.5 f [MHz] R [k ]
CF
SW F
n =
×× ×
()
πΩ
R[k ]
1
2 f [kHz] C [ F]
1
Z2 I
Ω=
××πμ
R[k ]
1
2 f [kHz] C [ F]
I
P2 I
Ω=
××πμ
C pF]
2 f [kHz] L[ H] C [ F]
4 R [k ]
I
CO OUT
F
[ =
×××
()
×
πμμ
Ω
4
1
(2 f [kHz]) C [ F] L[ H]
2 f [kHz] C [ F] R [k ] 1
CO
2
OUT
CO I F
×
×××
×× × × =
πμμ
π pΩ
Gain 2 f [kHz] C [ F] R [k ]
E/A CO I F
× ×πμΩ
Gain 4
1
(2 f [MHz]) L[ H] C [ F]
MOD
CO
2
OUT
×××πμμ
C[F]
1
2 R [k ] 0.5 f [kHz]
F
FLC
μ
π
=
×××Ω
f [MHz]
1
2 L[ H] C F]
LC
OUT
××πμ μ[
f [kHz]
f [kHz]
10
CO
SW
f
1
2RC
Z1
FF
=
××π
MAX15021
Dual, 4A/2A, 4MHz, Step-Down
DC-DC Regulator withTracking/
Sequencing Capability
Maxim Integrated | 20www.maximintegrated.com
Applications Information
PCB Layout Guidelines
Careful PCB layout is critical to achieve clean and sta-
ble operation. Follow these guidelines for good PCB
layout:
1) Place decoupling capacitors as close as possible to
the IC pins.
2) Keep SGND and PGND isolated and connect them
at one single point close to the negative terminal of
the input filter capacitor.
3) Route high-speed switching nodes away from sensi-
tive analog areas (FB_, COMP_, and EN_).
4) Distribute the power components evenly across the
board for proper heat dissipation.
5) Ensure timing resistor and all feedback connections
are short and direct. Place feedback resistors as
close as possible to the IC.
6) Place the bank of the output capacitors close to the
load.
7) Connect the MAX15021 exposed pad to a large
copper plane to maximize its power dissipation
capability. Connect the exposed pad to SGND
plane. Do not connect the exposed pad to the
SGND pin directly underneath the IC.
8) Use 2oz. copper to keep trace inductance and
resistance to a minimum. Thin copper PCBs can
compromise efficiency since high currents are
involved in the application. Also thicker copper con-
ducts heat more effectively, thereby reducing ther-
mal impedance.
9) A reference PCB layout included in the MAX15021
Evaluation Kit is also provided to further aid layout.
MAX15021
Dual, 4A/2A, 4MHz, Step-Down
DC-DC Regulator withTracking/
Sequencing Capability
Maxim Integrated | 21www.maximintegrated.com
Typical Operating Circuits
C
I2
MAX15021
LX2
PGND2
EN1
DVDD1
RT SEL COMP1SGND
AVIN EN2 PVIN2 DVDD2
C
DD1
C
CF2
C
F2
R
F2
R
T
R
I2
R
1
C
1
V
IN
R
1FB1
R
I1
R
S2
L
2
R
2FB2
R
2FB1
R
1FB2
C
T
C
2
C
I1
C
OUT2
V
OUT2
V
AVIN
C
S2
C
IN2
C
DD2
FB2
V
IN
PVIN1
C
IN1
V
IN
COMP2
C
CF1
C
F1
R
F1
LX1
PGND1
FB1
PGND SGND
R
S1
L
1
C
OUT1
V
OUT1
V
AVIN
C
S1
R
1EN2
R
2EN2
Figure 7. MAX15021 Double Buck with Tracking

MAX15021ATI+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Switching Voltage Regulators Dual 4A/2A 4MHz w/Tracking/Seq
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet