MAX15021EVKIT+ Datasheet MAX15021ATI+T, MAX15021ATI+, MAX15021EVKIT+ | P13-P15

MAX15021

Dual, 4A/2A, 4MHz, Step-Down

DC-DC Regulator withTracking/

Sequencing Capability

Maxim Integrated | 13www.maximintegrated.com

Effective Input-Voltage Range

Although the MAX15021’s regulators can operate from

input supplies ranging from 2.5V to 5.5V, the input-volt-

age range can be effectively limited by the

MAX15021’s duty-cycle limitations for a given output

voltage (V

OUT_

). The maximum input voltage

PVIN_MAX

) can be effectively limited by the control-

lable minimum on-time (t

ON(MIN)

where t

ON(MIN)

is 0.06µs (typ).

The minimum input voltage (V

PVIN_MIN

) can be effec-

tively limited by the maximum controllable duty cycle

and is calculated using the following equation:

where V

OUT_

is the regulator output voltage and

OFF(MIN)

is the 0.06µs (typ) controllable off-time.

Inductor Selection

Three key inductor parameters must be specified for

operation with the MAX15021: inductance value (L),

peak inductor current (I

PEAK

), and inductor saturation

current (I

SAT

). The minimum required inductance is a

function of operating frequency, input-to-output voltage

differential, and the peak-to-peak inductor current

(ΔI

P-P

). Higher ΔI

P-P

allows for a lower inductor value. A

lower inductance minimizes size and cost and

improves large-signal and transient response.

However, efficiency is reduced due to higher peak cur-

rents and higher peak-to-peak output-voltage ripple for

the same output capacitor. A higher inductance

increases efficiency by reducing the ripple current;

however, resistive losses due to extra wire turns can

exceed the benefit gained from lower ripple current lev-

els especially when the inductance is increased without

also allowing for larger inductor dimensions. Choose

the inductor’s peak-to-peak current, ΔI

P-P,

in the range

of 20% to 50% of the full load current; as a rule of

thumb 30% is typical.

Calculate the inductance, L, using the following equation:

where V

PVIN_

is the input supply voltage, V

OUT_

is the

regulator output voltage, and f

is the switching fre-

quency. Use typical values for V

PVIN_

and V

OUT_

that efficiency is optimum for typical conditions. The

switching frequency (f

) is programmable between

500kHz and 4MHz (see the

Oscillator

section).

The peak-to-peak inductor current (ΔI

P-P

), which

reflects the peak-to-peak output ripple, is largest at the

maximum input voltage. See the

Output-Capacitor

Selection

section to verify that the worst-case output

current ripple is acceptable.

Select an inductor with a saturation current, I

SAT

, high-

er than the maximum peak current to avoid runaway

current during continuous output short-circuit condi-

tions. Also, confirm that the inductor’s thermal perfor-

mances and projected temperature rise above ambient

does not exceed its thermal capacity. Many inductor

manufacturers provide bias/load current versus tem-

perature rise performance curves (or similar) to obtain

this information.

Input-Capacitor Selection

The discontinuous input current of the buck converter

causes large input ripple currents and therefore, the

input capacitor must be carefully chosen to withstand

the input ripple current and keep the input-voltage rip-

ple within design requirements.

The input-voltage ripple is comprised of ΔV

(caused by

the capacitor discharge) and ΔV

ESR

(caused by the ESR

of the input capacitor). The total voltage ripple is the

sum of ΔV

and ΔV

ESR

which peaks at the end of the

on-cycle. Calculate the required input capacitance and

ESR for a specified ripple using the following equations:

LOAD(MAX)

is the maximum output current, ΔI

P-P

is the

peak-to-peak inductor current, and V

PVIN_

is the input

supply voltage, V

OUT_

is the regulator output voltage,

and f

is the switching frequency.

ESR

V [mV]

[A]

I [A]

V [V]

V [V] f [MHz]

I [A]

V V [V] V [V]

V [V] f [MHz] L

ESR

LOAD(MAX)

PVIN_

LOAD(MAX)

OUT_

PVIN_

QSW

PVIN_ OUT_ OUT_

PVIN_ SW

[]

⎛

⎝

⎜

⎞

⎠

⎟

⎛

⎝

⎜

⎞

⎠

⎟

−

()

××

−

[]

μ=

×−

××

−

V [V] (V [V] V [V])

V [V] f [MHz]

OUT_ PVIN_ OUT_

PVIN_ SW

V [V]

1 (t [ s] f [MHz])

PVIN_MIN

OUT_

OFF(MIN) SW

≥

−×μ

V [V]

t [ s] f [MHz]

PVIN_MAX

OUT_

ON(MIN) SW

≤

×μ

MAX15021

Dual, 4A/2A, 4MHz, Step-Down

DC-DC Regulator withTracking/

Sequencing Capability

Maxim Integrated | 14www.maximintegrated.com

Use the following equation to calculate the input ripple

when only one regulator is enabled:

The MAX15021 includes UVLO hysteresis to avoid possi-

ble unintentional chattering during turn-on. Use additional

bulk capacitance if the input source impedance is high. If

using a lower input voltage, additional input capacitance

helps to avoid possible undershoot below the undervolt-

age lockout threshold during transient loading.

Output-Capacitor Selection

The allowed output-voltage ripple and the maximum

deviation of the output voltage during load steps deter-

mine the required output capacitance and its ESR. The

output ripple is mainly composed of ΔV

(caused by

the capacitor discharge) and ΔV

ESR

(caused by the

voltage drop across the equivalent series resistance of

the output capacitor). The equations for calculating the

output capacitance and its ESR are:

where ΔI

P-P

is the peak-to-peak inductor current, and

is the switching frequency.

ΔV

ESR

and ΔV

are not directly additive since they are

out of phase from each other. If using ceramic capaci-

tors, which generally have low ESR, ΔV

dominates. If

using electrolytic capacitors, ΔV

ESR

dominates.

The allowable deviation of the output voltage during

fast load transients also affects the output capacitance,

its ESR, and its equivalent series inductance (ESL). The

output capacitor supplies the load current during a

load step until the controller responds with an

increased duty cycle. The response time (t

RESPONSE

)

depends on the gain bandwidth of the controller (see

the

Compensation-Design Guidelines

section). The

resistive drop across the output capacitor’s ESR

(ΔV

ESR

), the drop across the capacitor’s ESL (ΔV

ESL

and the capacitor discharge (ΔV

) cause a voltage

droop during the load-step (I

STEP

). Use a combination

of low-ESR tantalum/aluminum electrolyte and ceramic

capacitors for better load transient and voltage ripple

performance. Nonleaded capacitors and capacitors in

parallel help reduce the ESL. Keep the maximum out-

put voltage deviation below the tolerable limits of the

electronics being powered.

Use the following equations to calculate the required

output capacitance, ESR, and ESL for minimal output

deviation during a load step:

where I

STEP

is the load step, t

STEP

is the rise time of the

load step, and t

RESPONSE

is the response time of the

controller.

Compensation-Design Guidelines

The MAX15021 uses a fixed-frequency, voltage-mode

control scheme that regulates the output voltage by

comparing the output voltage against a fixed reference.

The subsequent “error” voltage that appears at the

error-amplifier output (COMP_) is compared against an

internal ramp voltage to generate the required duty

cycle of the pulse-width modulator. A second-order

lowpass LC filter removes the switching harmonics and

passes the DC component of the pulse-width-modulat-

ed signal to the output. The LC filter has an attenuation

slope of -40dB/decade and introduces 180° of phase

shift at frequencies above the LC resonant frequency.

This phase shift in addition to the inherent 180° of

phase shift of the regulator’s negative feedback system

turns the feedback into unstable positive feedback. The

error amplifier and its associated circuitry must be

designed to achieve a stable closed-loop system.

The basic controller loop consists of a power modulator

(comprised of the regulator’s pulse-width modulator,

associated circuitry, and LC filter), an output feedback

divider, and an error amplifier. The power modulator has

a DC gain set by V

AVIN

RAMP

where the ramp voltage

RAMP

) is a function of the V

AVIN

and results in a fixed

DC gain of 4V/V, providing effective feed-forward com-

pensation of input-voltage supply DC variations. The

feed-forward compensation eliminates the dependency

of the power modulator’s gain on the input voltage such

that the feedback compensation of the error amplifier

requires no modifications for nominal input-voltage

changes. The output filter is effectively modeled as a

double-pole and a single zero set by the output induc-

tance (L), the DC resistance of the inductor (DCR), the

output capacitance (C

OUT

) and its equivalent series

resistance (ESR).

ESR m

V [mV]

I [A]

I [A] t

V [V]

ESL

V [mV] t

I [A]

ESR

STEP

OUT

STEP RESPONSE

ESL STEP

STEP

[]

I [A]

8 V [V] f [MHz]

ESR m

2 V [mV]

I [A]

OUT

QSW

ESR

[]

μ=

××

−

I [A] I [A]

V [V] V V [V]

V [V]

CIN(RMS) LOAD(MAX)

OUT_ PVIN_ OUT_

PVIN_

=×

×−

()

MAX15021

Dual, 4A/2A, 4MHz, Step-Down

DC-DC Regulator withTracking/

Sequencing Capability

Maxim Integrated | 15www.maximintegrated.com

Below are equations that define the power modulator:

OUT

is the load resistance of the regulator, f

is the

resonant break frequency of the filter, and f

ESR

is the

ESR zero of the output capacitor. See the

Closed-Loop

Response and Compensation of Voltage-Mode

Regulators

section for more information on f

and f

ESR

The switching frequency (f

) is programmable

between 500kHz and 4MHz. Typically, the crossover

frequency (f

)—the frequency at which the system’s

closed-loop gain is equal to unity (crosses 0dB)—

should be set at or below one-tenth the switching fre-

quency (f

/10) for stable closed-loop response.

The MAX15021 provides an internal voltage-mode error

amplifier with its inverting input and its output available to

the user for external frequency compensation. The flexi-

bility of external compensation for each controller offers

a wide selection of output filtering components, especial-

ly the output capacitor. For cost-sensitive applications,

use aluminum electrolytic capacitors while for space-

sensitive applications, use low-ESR tantalum or multilay-

er ceramic chip (MLCC) capacitors at the output. The

higher switching frequencies of the MAX15021 allow the

use of MLCC as the primary filter capacitor(s).

First, select the passive and active power components

that meet the application output ripple, component

size, and component cost requirements. Second,

choose the small-signal compensation components to

achieve the desired closed-loop frequency response

and phase margin as outlined below.

Closed-Loop Response and Compensation

of Voltage-Mode Regulators

The power modulator’s LC lowpass filter exhibits a vari-

ety of responses, dependent on the value of the L and

C and their parasitics. Higher resistive parasitics

reduce the Q of the circuit, reducing the peak gain and

phase of the system; however, efficiency is also

reduced under these circumstances.

One such response is shown in Figure 4a. In this exam-

ple, the ESR zero occurs relatively close to the filter’s

resonant break frequency, f

. As a result, the power

modulator’s uncompensated crossover is approximate-

ly one-third the desired crossover frequency, f

. Note

also, the uncompensated rolloff through the 0dB plane

follows a single-pole, -20dB/decade slope, and 90° of

phase lag. In this instance, the inherent phase margin

ensures a stable system; however, the gain-bandwidth

product is not optimized.

Gain

4V/V

2LC

R ESR

R DCR

2LC

2 ESR C

MOD(DC)

AVIN

RAMP

AVIN

OUT

ESR

OUT

===

×× ×

⎛

⎝

⎜

⎞

⎠

⎟

≈

××

MAX15021 fig04a

MAGNITUDE (dB)

PHASE (DEGREES)

-60

-40

-20

-80

100 1k 10k

FREQUENCY (Hz)

100k

1M 10M

-135

-90

-45

-180

MOD

ESR

< G

MOD

| ASYMPTOTE

Figure 4a. Power Modulator Gain and Phase Response with

Lossy Bulk Output Capacitor(s) (Aluminum)

MAX15021 fig04b

MAGNITUDE (dB)

PHASE (DEGREES)

FREQUENCY (Hz)

-60

-40

-20

-80

-135

-90

-45

135

180

-180

100 1k 10k 100k

1M 10M

< G

MOD

ESR

< G

MOD

Figure 4b. Power Modulator and Type II Compensator Gain and

Phase Response with Lossy Bulk Output Capacitor(s) (Aluminum)

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24

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