IRF9310PbF
www.irf.com 5
Fig 14. Maximum Avalanche Energy vs. Drain Current
Fig 12. On-Resistance vs. Gate Voltage
Fig 13. Typical On-Resistance vs. Drain Current
Fig 16. Typical Power vs. Time
* Reverse Polarity of D.U.T for P-Channel
P.W.
Period
di/dt
Diode Recovery
dv/dt
Ripple ≤ 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D =
P. W .
Period
* V
GS
= 5V for Logic Level Devices
*
Inductor Current
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
• di/dt controlled by R
G
• Driver same type as D.U.T.
• I
SD
controlled by Duty Factor "D"
• D.U.T. - Device Under Test
+
+
+
-
-
-
R
G
V
DD
D.U.T *
Fig 17. Diode Reverse Recovery Test Circuit for P-Channel HEXFET
®
Power MOSFETs
2 4 6 8 10 12 14 16 18 20
-V
GS,
Gate -to -Source Voltage (V)
2
4
6
8
10
12
R
D
S
(
o
n
)
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
O
n
R
e
s
i
s
t
a
n
c
e
(
m
Ω
)
T
J
= 125°C
T
J
= 25°C
I
D
= -20A
25 50 75 100 125 150
Starting T
J
, Junction Temperature (°C)
0
300
600
900
1200
1500
1800
2100
2400
2700
E
A
S
,
S
i
n
g
l
e
P
u
l
s
e
A
v
a
l
a
n
c
h
e
E
n
e
r
g
y
(
m
J
)
I
D
TOP -1.8A
-2.7A
BOTTOM -16A
0 20 40 60 80 100 120 140 160
-I
D
, Drain Current (A)
2
4
6
8
10
12
14
R
D
S
(
o
n
)
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
O
n
R
e
s
i
s
t
a
n
c
e
(
m
Ω
)
V
GS
= -10V
V
GS
= -4.5V
1E-5 1E-4 1E-3 1E-2 1E-1 1E+0
Time (sec)
0
200
400
600
800
1000
S
i
n
g
l
e
P
u
l
s
e
P
o
w
e
r
(
W
)
