VN750SMP-E Electrical specifications
Doc ID 16812 Rev 2 11/27
Output voltage > V
OL
L
H
H
H
L
H
Output current < I
OL
L
H
L
H
H
L
Table 13. Electrical transient requirements on V
CC
pin (part 1/3)
ISO T/R 7637/1
test pulse
Test levels
I II III IV
Delays and
impedance
1 -25 V -50 V -75 V -100 V 2 ms 10
2 +25 V +50 V +75 V +100 V 0.2 ms 10
3a -25 V -50 V -100 V -150 V 0.1 µs 50
3b +25 V +50 V +75 V +100 V 0.1 µs 50
4 -4 V -5 V -6 V -7 V 100 ms, 0.01
5 +26.5 V +46.5 V +66.5 V +86.5 V 400 ms, 2
Table 14. Electrical transient requirements on V
CC
pin (part 2/3)
ISO T/R 7637/1
test pulse
Test levels results
I II III IV
1CCCC
2CCCC
3aCCCC
3bCCCC
4CCCC
5C E E E
Table 15. Electrical transient requirements on V
CC
pin (part 3/3)
Class Contents
C All functions of the device are performed as designed after exposure to disturbance.
E
One or more functions of the device is not performed as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
Table 12. Truth table
Conditions Input Output Status
