7
LTC1754-3.3/LTC1754-5
range. The capacitor manufacturer’s data sheet should be
consulted to determine what style and value of capacitor
is needed to ensure 0.6µF at all temperatures.
Output Ripple
Low frequency
regulation mode
ripple exists due to the
hysteresis in the sense comparator and propagation delay
in the charge pump control circuit. The amplitude and
frequency of this ripple are heavily dependent on the load
current, the input voltage and the output capacitor size.
For large V
IN
the ripple voltage can become substantial
because the increased strength of the charge pump causes
fast edges that may outpace the regulation circuitry.
Generally the regulation ripple has a sawtooth shape
associated with it.
A high frequency ripple component may also be present
on the output capacitor due to the charge transfer action
of the charge pump. In this case the output can display a
voltage pulse during the charging phase. This pulse
results from the product of the charging current and the
ESR of the output capacitor. It is proportional to the input
voltage, the value of the flying capacitor and the ESR of the
output capacitor.
Typical combined output ripple for the LTC1754-5 with
V
IN
= 3V under maximum load is 65mV
P-P
using a low ESR
10µF output capacitor. A smaller output capacitor and/or
larger output current load will result in higher ripple due to
higher output voltage slew rates.
There are several ways to reduce output voltage ripple. For
applications requiring higher V
IN
or lower peak-to-peak
ripple, a larger C
OUT
capacitor (22µF or greater) is recom-
mended. A larger capacitor will reduce both the low and
high frequency ripple due to the lower charging and
discharging slew rates, as well as the lower ESR typically
found with higher value (larger case size) capacitors. A low
ESR ceramic output capacitor will minimize the high
frequency ripple, but will not reduce the low frequency
ripple unless a high capacitance value is used. To reduce
both the low and high frequency ripple, a reasonable
compromise is to use a 10µF to 22µF tantalum capacitor
in parallel with a 1µF to 3.3µF ceramic capacitor on V
OUT
.
An R-C filter may also be used to reduce high frequency
voltage spikes (see Figure 1).
Figure 1. Output Ripple Reduction Techniques
In low load or high V
IN
applications, smaller values for the
flying capacitor may be used to reduce output ripple. A
smaller flying capacitor (0.01µF to 0.47µF) delivers less
charge per clock cycle to the output capacitor resulting in
lower output ripple. However, with a smaller flying capaci-
tor, the maximum available output current will be reduced
along with the efficiency.
Note that when using a larger output capacitor the turn on
time of the device will increase.
Inrush Currents
During normal operation V
IN
will experience current tran-
sients in the 50mA to 100mA range whenever the charge
pump is enabled. However during start-up, inrush cur-
rents may approach 250mA. For this reason it is important
to minimize the source impedance between the input
supply and the V
IN
pin. Too much source impedance may
result in regulation problems or prevent start-up.
Ultralow Quiescent Current Regulated Supply
The LTC1754 contains an internal resistor divider (refer to
the Simplified Block Diagram) that typically draws 1.5µA
from V
OUT
. During no-load conditions, this internal load
causes a droop rate of only 150mV per second on V
OUT
with C
OUT
= 10µF. Applying a 2Hz to 100Hz, 2% to 5% duty
cycle signal to the SHDN pin ensures that the circuit of
Figure 2 comes out of shutdown frequently enough to
maintain regulation. Since the LTC1754 spends nearly the
entire time in shutdown, the no-load quiescent current is
approximately (V
OUT
)(1.5µA)/(ηV
IN
).
The LTC1754 must be out of shutdown for a minimum
duration of 200µs to allow enough time to sense the output
voltage and keep it in regulation. A 2Hz, 2% duty cycle
LTC1754-X
15µF
TANTALUM
V
OUT
V
OUT
V
OUT
1µF
CERAMIC
LTC1754-X
2Ω
10µF
TANTALUM
10µF
TANTALUM
V
OUT
1754 F01
+
+ +
APPLICATIO S I FOR ATIO
WUUU
