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1.7 Digital I/O Electrical Specifications
1.8 Voltage and Power Specifications
Parameter Test Conditions Symbol Minimum Typical Maximum Unit
Input Characteristics
Input voltage, Logic low Input voltage falling
V
IL
0.8 1.1
V
Input voltage, Logic high Input voltage rising
V
IH
1.7 2.0
Input leakage current,
IN
RINGING
, Logic high
V
DD
= 5.5V, V
BAT
= -75V, V
HI
=2.4V I
IH
-0.11A
Input leakage current,
IN
RINGING
, Logic low
V
DD
= 5.5V, V
BAT
= -75V, V
IL
= 0.4V I
IL
-0.11A
Input leakage current,
LATCH Logic high
V
DD
= 4.5V, V
BAT
= -75V, V
IH
= 2.4V I
IH
719-A
LATCH Pull-up
Minimum Load
V
DD
= 4.5V, V
BAT
= -75V, I
IN
= -10 A
Latch input transitions to logic high.
Logic = High True
Input leakage current,
LATCH Logic low
V
DD
= 5.5V, V
BAT
= -75V, V
IL
= 0.4V I
IL
- 46 125 A
Input leakage current,
T
SD
Logic high
V
DD
= 5.5V, V
BAT
= -75V, V
IH
= 2.4V I
IH
10 16 30 A
Input leakage current,
T
SD
Logic low
V
DD
= 5.5V, V
BAT
= -75V, V
IL
= 0.4V I
IL
10 16 30 A
Output Characteristics
Output voltage,
T
SD
Logic high
V
DD
= 5.5V, V
BAT
= -75V, I
TSD
= 10AV
TSD_off
2.4
V
DD
-V
Output voltage,
T
SD
Logic low
V
DD
= 5.5V, V
BAT
= -75V, I
TSD
= 1mA
(Not production tested - limits are
guaranteed by design and quality
control sampling audits.)
V
TSD_on
-00.4V
Parameter Test Conditions Symbol Minimum Typical Maximum Unit
Voltage Requirements
V
DD
-
V
DD
4.5 5.0 5.5 V
V
BAT
1
-
V
BAT
-19 -48 -72 V
1
V
BAT
is used only for internal protection circuitry. If V
BAT
goes more positive than -10 V, the device will enter the All-Off state, and will remain in the All-Off state
until the battery goes more negative than -15V
Power Specifications
Power consumption
V
DD
= 5V, V
BAT
= -48V,
Measure I
DD
and I
BAT
,
Talk and All-Off states P - 5.5 10.5 mW
Ringing state P - 6.5 10.5 mW
V
DD
current
V
DD
= 5V, V
BAT
= -48V
Talk and All-Off states
I
DD
-1.12.0mA
Ringing state
I
DD
-1.32.0mA
V
BAT
current V
DD
= 5V, V
BAT
= -48V, All states I
BAT
-0.110A
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CPC7691
1.9 Protection Circuitry Electrical Specifications
1.10 Truth Table
Parameter Conditions Symbol Minimum Typical Maximum Unit
Protection Diode Bridge
Forward Voltage drop,
continuous current
(50/60 Hz)
Apply ± DC current limit of break
switches
V
F
-2.13.0
V
Forward Voltage drop,
surge current
Apply ± dynamic current limit of break
switches
-5-
Protection SCR (CPC7691BA)
Surge current - - - - * A
Trigger current:
Current into V
BAT
pin
SCR activates, +25C
I
TRIG
-
65
-mA
SCR activates, +85C45
Hold current: Current
through protection SCR
SCR remains active, +25C
I
HOLD
- 195
-mA
SCR remains active, +85C 110 130
Gate trigger voltage
I
GATE
= I
TRIGGER
§
V
TBAT
or
V
RBAT
V
BAT
-4
-
V
BAT
-2
V
Reverse leakage current
V
BAT
= -48V I
VBAT
-0.21.0A
On-state voltage
0.5A, t = 0.5 sV
TBAT
or
V
RBAT
-
-3
-V
2.0A, t = 0.5 s-5
Temperature Shutdown Specifications
Shutdown activation
temperature
Not production tested - limits are
guaranteed by design and Quality
Control sampling audits.
T
TSD_on
110 125 150 C
Shutdown circuit
hysteresis
T
TSD_off
10 - 25 C
*Passes GR1089 and ITU-T K.20 with appropriate secondary protection in place.
§
V
BAT
must be capable of sourcing I
TRIGGER
for the internal SCR to activate.
State
IN
RINGING
Latch
T
SD
Break
Switches
Ringing Switches
Ta l k 0
0
Z
1
On Off
Ringing 1 Off
On
Latched
2
X 1 Unchanged Unchanged
All-Off X X 0 Off Off
1
Z = High Impedance. Because T
SD
has an internal pull-up at this pin, it should be controlled with an open-collector or open-drain type device.
2
Not a state; indicates existing state can not be changed via the IN
RINGING
input.
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2. Functional Description
2.1 Introduction
The CPC7691 has three states:
Talk. Line break switches SW1 and SW2 closed,
ringing switches SW3 and SW4 open.
Ringing. Ringing switches SW3 and SW4 closed,
line break switches SW1 and SW2 open.
All-Off. All switches open.
See “Truth Table” on page 8 for more information.
The CPC7691 offers both break-before-make and
make-before-break switching techniques when
transitioning from the ringing state to the talk state with
simple TTL level logic input control. Solid-state switch
construction means no impulse noise is generated
when switching during ringing cadence or ring trip
thereby eliminating the need for external zero-cross
switching circuitry. State-control input is via TTL logic
levels so no additional driver circuitry is required. The
linear line break switches, SW1 and SW2, have
exceptionally low R
ON
and excellent matching
characteristics. SW4, the ringing switch, has a
minimum open contact breakdown voltage of 465V at
+25C and a minimum dv/dt immunity of 1500v/us,
sufficiently high to prevent breakdown in the presence
of a transient fault condition (i.e., prevent passing the
transient on to the ringing generator).
Integrated into the CPC7691 is an over-voltage
clamping circuit, active current limiting, and a thermal
shutdown mechanism to provide protection to the
SLIC during a fault condition. Positive and negative
lightning surge currents are reduced by the current
limiting circuitry and hazardous potentials are diverted
away from the SLIC via the protection diode bridge or
the optional integrated protection SCR. Power-cross
potentials are also reduced by the current limiting and
thermal shutdown circuits.
To protect the CPC7691 from an over-voltage fault
condition, the use of a secondary protector is required.
The secondary protector must limit the voltage seen at
the T
LINE
and R
LINE
terminals to a level below the
maximum breakdown voltage of the switches. To
minimize the stress on the solid-state contacts, use of
a foldback or crowbar type secondary protector is
highly recommended. With proper selection of the
secondary protector, a line card using the CPC7691
will meet all relevant ITU, LSSGR, TIA/EIA and IEC
protection requirements.
The CPC7691 operates from a single +5V supply
giving the device extremely low power consumption
with virtually any range of battery voltage. The battery
voltage used by the CPC7691 has a twofold function.
First, for protection purposes, it is used as a current
source during fault conditions by the integrated
internal protection circuitry. Second, it is used as a
reference so that in the event of battery voltage loss,
the CPC7691 will enter the All-Off state.
2.2 Start-up
The CPC7691 uses smart logic to monitor the V
DD
supply. Any time V
DD
is below the internally set Under
Voltage Lock Out (UVLO) threshold, the smart logic
places the switch control logic into the All-Off state. An
internal pull-up at the LATCH pin holds the CPC7691
in the All-Off state until the LATCH pin is pulled down
to a logic low. The control input, IN
RINGING
, must be
properly conditioned prior to the assertion of a logic
low at the LATCH pin.
2.3 Data Latch
The CPC7691 has an integrated transparent data
latch. Latch enable operation is controlled by the
application of TTL logic input levels at the LATCH pin.
Data into the latch is via the input pin, IN
RINGING
, while
the data latch output is an internal node used for state
control. When the LATCH enable control pin is at
logic 0, the data latch is transparent, and the
IN
RINGING
data signal flows directly through the latch
to the state control circuitry. With LATCH = 0, a change
at IN
RINGING
will be reflected by a switch state change.
Whenever LATCH = 1, the data latch is active and
data is locked. Subsequent changes at IN
RINGING
will
not result in a change to the control logic or affect the
existing state.

CPC7691BB

Mfr. #:
Manufacturer:
IXYS Integrated Circuits
Description:
Switch ICs - Various LCAS4 TTL Inputs
Lifecycle:
New from this manufacturer.
Delivery:
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