OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

CS8151YNF16G

P1-P3P4-P6P7-P9P10-P12P13-P14
CS8151
http://onsemi.com
4
ELECTRICAL CHARACTERISTICS (−40°C ≤ T
A
≤ 125°C, −40°C ≤ T
J
≤ 150°C, 6.0 V ≤ V
IN
≤ 26 V, 100 mA ≤ I
OUT
≤ 100 mA,
C
2
= 47 mF (ESR < 8.0 W), C
Delay
= 0.1 mF; unless otherwise specified.)
Characteristic UnitMaxTypMinTest Conditions
RESET
Current Limit RESET = 0 V, V
OUT
> V
RTH
(Sourcing)
RESET
= 5.0 V, V
OUT
> 1.0 V (Sinking)
0.025
0.1
0.5
12
1.30
80
mA
mA
Delay Time POR Mode 3.0 5.0 7.0 ms
Watchdog Input
Threshold High
− − 1.4 2.0 V
Threshold Low − 0.8 1.3 − V
Hysteresis − 25 100 − mV
Input Current 0 < WDI < 6.0 V −10 0 +10
mA
Pulse Width 50% WDI Falling Edge to
50% WDI Rising Edge and
50% WDI Rising Edge to
50% WDI Falling Edge
(see Figures 2, 3, and 4)
5.0 − −
ms
Wake Up Output
Wake Up Period See Figure 2 30 40 50 ms
Wake Up Duty Cycle Nominal See Figure 4 40 50 60 %
RESET High to
Wake Up Rising Delay Time
50% RESET Rising Edge to
50% Wake Up Edge
(see Figures 2, 3, and 4)
15 20 25 ms
Wake Up Response to
Watchdog Input
50% WDI Falling Edge to
50% Wake Up Falling Edge
− 2.0 10
ms
Wake Up Response to
RESET
50% RESET Falling Edge to
50% Wake Up Falling Edge,
V
OUT
= 5.0 V → 4.5 V
− 2.0 10
ms
Output Low
I
OUT
= 25 mA (Sinking)
− 0.2 0.8 V
Output High
I
OUT
= 25 mA (Sourcing)
3.8 4.2 5.1 V
Current Limit Wake Up = 5.0 V
Wake Up = 0 V
0.025
0.05
1.0
−
7.0
3.5
mA
mA
CS8151
http://onsemi.com
5
PACKAGE PIN DESCRIPTION
Package Pin #
Pin
Symbol
Function
SO−14L D
2
PAK SO−16L
7 1 8 V
OUT
Regulated output voltage 5.0 V ± 2%.
8 2 9 V
IN
Supply voltage to the IC.
9 3 11 WDI CMOS/TTL compatible input lead. The Watchdog function monitors the falling
edge of the incoming signal.
3−5,
10−12
4 4, 5, 6, 12, 13* GND Ground connection.
13 5 14 Wake Up CMOS/TTL compatible output consisting of a continuously generated signal used
to Wake Up the microprocessor from sleep mode.
14 6 15 RESET CMOS/TTL compatible output lead RESET goes low whenever V
OUT
drops by
more than 6.0% from nominal, or during the absence of a correct watchdog
signal.
1 7 16 Delay Input lead from timing capacitor for RESET and Wake Up signal.
6 − 7 Sense Kelvin connection which allows remote sensing of the output voltage for im-
proved regulation. If remote sensing is not required, connect to V
OUT
.
*Pin 6 GND is not directly shorted to the fused paddle GND. The fused paddle GND (pins 4, 5, 12, 13) is connected through the substrate.
Pin 6 must be electrically connected to at least one of the fused paddle GND’s on the PC board.
CS8151
http://onsemi.com
6
TIMING DIAGRAMS
Watchdog
Pulse Width
V
IN
RESET
Wake Up
WDI
V
OUT
Wake Up
Duty Cycle = 50%
Power Up Sleep Mode Normal Operation with Varying Watchdog Signal
RESET
High
to Wake Up
Delay Time
POR
Figure 2. Power Up, Sleep Mode and Normal Operation
Figure 3. Error Condition: Watchdog Remains Low and a RESET
Is Issued
V
IN
RESET
Wake Up
WDI
V
OUT
POR
RESET High
to Wake Up
Delay Time
RESET Delay Time
RESET
High
to Wake Up
Delay Time
Wake Up
Period
POR
RESET
Wake Up
WDI
V
OUT
Watchdog Pulse Width
RTL
POR
Power Down
Wake Up Period
Figure 4. Power Down and Restart Sequence
P1-P3P4-P6P7-P9P10-P12P13-P14

CS8151YNF16G

Mfr. #:
Buy CS8151YNF16G
Manufacturer:
ON Semiconductor
Description:
LDO Voltage Regulators 5V 100mA w/WatchDog
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet