NCP3985SN275T1G

© Semiconductor Components Industries, LLC, 2008
April, 2008 - Rev. 1
1 Publication Order Number:
NCP3985/D
NCP3985
Micropower, 150 mA
Low-Noise, High PSRR,
Ultra-Low Dropout BiCMOS
Voltage Regulator
The NCP3985 is 150 mA LDO that provides the engineer with a
very stable, accurate voltage with low noise and high Power Supply
Rejection Ratio (PSRR) suitable for sensitive applications. In order to
optimize performance for battery operated portable applications, the
NCP3985 employs an advanced BiCMOS process to combine the
benefits of low noise and superior dynamic performance of bipolar
elements with very low ground current consumption at full loads
offered by CMOS.
The NCP3985 is stable with small, low value capacitors and is
available in TSOP-5 package.
Features
Output Voltage Options:
- 1.8 V, 2.5 V, 2.75 V, 2.8 V, 3.0 V, 3.3 V
- Contact Factory for Other Voltage Options
Output Current Limit 200 mA
Low Noise (typ 20 mV
rms
)
High PSRR (typ 70 dB)
Stable with Ceramic Output Capacitors as low as 1 mF
Low Sleep Mode Current (max 1 mA)
Active Discharge Circuit
Current Limit Protection
Thermal Shutdown Protection
Direct Replacement for LP3985
These are Pb-Free Devices
Typical Applications
Cellular Telephones
Noise Sensitive Applications (Video, Audio)
Analog Power Supplies
PDAs / Palmtops / Organizers / GPS
Battery Supplied Devices
NCP3985
CE
GND
Figure 1. Typical Application Schematic
V
in
V
out
C
in
C
out
C
noise
V
in
V
out
C
noise
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MARKING
DIAGRAM
See detailed ordering, marking and shipping information in the
package dimensions section on page 9 of this data sheet.
ORDERING INFORMATION
(Note: Microdot may be in either location)
C
noise
V
out
GND
V
in
CE
PIN ASSIGNMENT
(Top View)
XXX = Specific Device Code
A = Assembly Location
Y = Year
W = Work Week
G = Pb-Free Package
1
5
XXXAYWG
G
1
5
TSOP-5
SN SUFFIX
CASE 483
NCP3985
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2
Figure 2. Simplified Block Diagram
+
-
Current
Limit
Bandgap
Reference
Voltage
CE
GND
Active
Discharge
V
out
V
in
C
noise
PIN FUNCTION DESCRIPTION
Pin No. Pin Name Description
1 V
in
Power Supply Input Voltage
2 GND Power Supply Ground
3 CE Chip Enable: This pin allows on/off control of the regulator. To disable the device, connect to
GND. If this function is not in use, connect to V
in
. Internal 5 MW Pull Down resistor is connected
between CE and GND.
4 C
noise
Noise reduction pin. (Connect 100 nF or 10 nF capacitor to GND)
5 V
out
Regulated Output Voltage
MAXIMUM RATINGS
Rating Symbol Value Unit
Input Voltage (Note 1) V
in
-0.3 V to 6 V V
Chip Enable Voltage V
CE
-0.3 V to V
in
+0.3 V V
Noise Reduction Voltage V
Cnoise
-0.3 V to V
in
+0.3 V V
Output Voltage V
out
-0.3 V to V
in
+0.3 V V
Maximum Junction Temperature (Note 1) T
J(max)
150 °C
Storage Temperature Range T
STG
-55 to 150 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
NOTE: This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per MIL-STD-883, Method 3015
Machine Model Method 200 V
THERMAL CHARACTERISTICS
Rating Symbol Value Unit
Package Thermal Resistance: (Note 1)
Junction-to-Lead (pin 5)
Junction-to-Ambient
R
θ
JA
109
220
°C/W
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area
NCP3985
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3
ELECTRICAL CHARACTERISTICS
(V
in
= V
out
+ 0.5 V, V
CE
= 1.2 V, C
in
= 0.1 mF, C
out
= 1 mF, C
noise
= 10 nF, T
A
= -40°C to 85°C, unless otherwise specified (Note 2))
Characteristic
Test Conditions Symbol Min Typ Max Unit
REGULATOR OUTPUT
Input Voltage
V
in
2.5 - 5.5 V
Output Voltage (Note 3) 1.8 V
2.5 V
2.75 V
2.8 V
3.0 V
3.3 V
V
in
= (V
out
+ 0.5 V) to 5.5 V
I
out
= 1 mA
V
out
1.764
2.450
2.695
2.744
2.940
3.234
(-2%)
-
-
-
-
-
-
1.836
2.550
2.805
2.856
3.060
3.366
(+2%)
V
Output Voltage (Note 3) 1.8 V
2.5 V
2.75 V
2.8 V
3.0 V
3.3 V
V
in
= (V
out
+ 0.5 V) to 5.5 V
I
out
= 1 mA to 150 mA
V
out
1.746
2.425
2.6675
2.716
2.910
3.201
(-3%)
-
-
-
-
-
-
1.854
2.575
2.8325
2.884
3.090
3.399
(+3%)
V
Power Supply Ripple Rejection V
in
= V
out
+ 0.5 V + 0.5 V
p-p
I
out
= 1 mA to 150 mA f = 120 Hz
C
noise
= 100nF f = 1 kHz
f = 10 kHz
PSRR
-
-
-
70
70
55
-
-
-
dB
Line Regulation V
in
= (V
out
+ 0.5 V) to 5.5 V, I
out
= 1 mA Reg
line
-0.2 - 0.2 %/V
Load Regulation I
out
= 1 mA to 150 mA Reg
load
- 12 25 mV
Output Noise Voltage f = 10 Hz to 100 kHz
I
out
= 1 mA to 150 mA C
noise
= 100 nF
C
noise
= 10 nF
V
n
-
-
20
25
-
-
mV
rms
Output Current Limit V
out
= V
out(nom)
– 0.1 V I
LIM
200 310 470 mA
Output Short Circuit Current V
out
= 0 V I
SC
210 320 490 mA
Dropout Voltage (Note 4) 2.5 V
2.75 V
2.8 V
3.0 V
3.3 V
I
out
= 150 mA V
DO
-
-
-
-
-
105
105
105
100
100
155
155
155
150
150
mV
GENERAL
Ground Current I
out
= 1 mA
I
out
= 150 mA
I
GND
-
-
70
110
90
220
mA
Disable Current V
CE
= 0 V I
DIS
- 0.1 1
mA
Thermal Shutdown Threshold (Note 5) T
SD
- 150 - °C
Thermal Shutdown Hysteresis (Note 5) T
SH
- 20 - °C
CHIP ENABLE
Input Threshold Low
High
V
th(CE)
-
1.2
-
-
0.4
-
V
Internal Pull-Down Resistance (Note 6) R
PD(CE)
2.5 5 10
MW
TIMING
Turn-on Time I
out
= 150 mA C
noise
= 10 nF
C
noise
= 100 nF
t
on
-
-
0.4
4
-
-
ms
Turn-off Time C
noise
= 10 nF/100 nF I
out
= 1 mA
I
out
= 10 mA
t
off
-
-
800
200
-
-
ms
2. Performance guaranteed over the indicated operating temperature range by design and/or characterization, production tested at
T
J
= T
A
= 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
3. Contact factory for other voltage options.
4. Measured when output voltage falls 100 mV below the regulated voltage at V
in
= V
out
+ 0.5 V if V
out
< 2.5 V, then V
DO
= V
in
- V
out
at V
in
= 2.5 V.
5. Guaranteed by design and characterization.
6. Expected to disable device when CE pin is floating.

NCP3985SN275T1G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
LDO Voltage Regulators RF LDO / 150mA
Lifecycle:
New from this manufacturer.
Delivery:
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