NCP3985
http://onsemi.com
8
APPLICATION INFORMATION
General
The NCP3985 is a 200 mA (current limited) linear
regulator with a logic input for on/off control for the high
speed turn-off output voltage.
Access to the major contributor of noise within the
integrated circuit is provided as the focus for noise reduction
within the linear regulator system.
Power Up/Down
During power up, the NCP3985 maintains a high
impedance output (V
out
) until sufficient voltage is present on
V
in
to power the internal bandgap reference voltage. When
sufficient voltage is supplied (approx 1.2 V), V
out
will start
to turn on (assume CE shorted to V
in
), linearly increasing
until the output regulation voltage has been reached.
Active discharge circuitry has been implemented to insure
a fast turn off time. Then CE goes low, the active discharge
transistor turns on creating a fast discharge of the output
voltage. Power to drive this circuitry is drawn from the
output node. This is to maintain the lowest quiescent current
when in the sleep mode (V
CE
= 0.4 V). This circuitry
subsequently turns off when the output voltage discharges.
CE (chip enable)
The enable function is controller by the logic pin CE. The
voltage threshold of this pin is set between 0.4 V and 1.2V.
A voltage lower than 0.4 V guarantees the device is off. A
voltage higher than 1.2 V guarantees the device is on. The
NCP3985 enters a sleep mode when in the off state drawing
less than 1 mA of quiescent current.
The device can be used as a simple regulator without use
of the chip enable feature by tying the CE pin to the V
in
pin.
Current Limit
Output Current is internally limited within the IC to a
minimum of 200 mA. The design is set to a higher value to
allow for variation in processing and the temperature
coefficient of the parameter. The NCP3985 will source this
amount of current measured with a voltage 100 mV lower
than the typical operating output voltage.
The specification for short circuit current limit (@ V
out
=
0V) is specified at 320 mA (typ). There is no additional
circuitry to lower the current limit at low output voltages.
This number is provided for informational purposes only.
Output Capacitor
The NCP3985 has been designed to work with low ESR
ceramic capacitors. There is no ESR lower limit for stability
for the recommended 1 mF output capacitor. Stable region
for Output capacitor ESR vs Output Current is shown in
Figure23.
Typical characteristics were measured with Murata
ceramic capacitors. GRM219R71E105K (1 mF, 25 V, X7R,
0805) and GRM21BR71A106K (10 mF, 10 V, X7R, 0805).
Output Noise
The main contributor for noise present on the output pin
V
out
is the reference voltage node. This is because any noise
which is generated at this node will be subsequently
amplified through the error amplifier and the PMOS pass
device. Access to the reference voltage node is supplied
directly through the C
noise
pin. Noise can be reduced from
a typical value of 25 mV
rms
by using 10 nF to 20 mV
rms
by
using a 100 nF from the C
noise
pin to ground.
A bypass capacitor is recommended for good noise
performance and better load transient response.
Thermal Shutdown
When the die temperature exceeds the Thermal Shutdown
threshold, a Thermal Shutdown (TSD) event is detected and
the output (V
out
) is turned off. There is no effect from the
active discharge circuitry. The IC will remain in this state
until the die temperature moves below the shutdown
threshold (150°C typical) minus the hysteresis factor (20°C
typical).
This feature provides protection from a catastrophic
device failure due to accidental overheating. It is not
intended to be used as a substitute for proper heat sinking.
The maximum device power dissipation can be calculated
by:
P
D
+
T
J
* T
A
R
qJA
Thermal resistance value versus copper area and package is
shown in Figure 24.
Figure 24. R
q
JA
vs. PCB Copper Area
PCB COPPER AREA (mm
2
)
7006005004003002001000
80
130
180
230
280
330
380
R
q
JA
, THERMAL RESISTANCE
JUNCTION-TO-AMBIENT (°C/W)
TSOP-5 (1 oz)
TSOP-5 (2 oz)
