OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

NCV8505D2T25R4G

P1-P3P4-P6P7-P9P10-P12
NCV8505 Series
http://onsemi.com
7
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 3. 5 V Output Voltage vs. Temperature
0
0
I
out
, OUTPUT CURRENT (mA)
50 100 150 200 250
DROPOUT VOLTAGE (mV)
400
300
200
100
5 V and Adj. > 5 V options only
Figure 4. 3.3 V Output Voltage vs. Temperature
Figure 5. 2.5 V Output Voltage vs. Temperature Figure 6. Dropout Voltage vs. Output Current
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
Figure 7. Output Voltage vs. Input Voltage Figure 8. Output Voltage vs. Input Voltage
500
600
125 °C
−40
V
out
, OUTPUT VOLTAGE (V)
4.90
TEMPERATURE (°C)
4.98
5.00
5.08
5.10
−20 1400 20 40 60 80 120100
V
OUT
= 5.0 V
V
IN
= 14 V
I
OUT
= 5.0 mA
4.96
5.06
4.94
5.04
4.92
5.02
160
−40
V
out
, OUTPUT VOLTAGE (V)
3.23
TEMPERATURE (°C)
3.31
3.33
3.35
−20 1400 20 40 60 80 120100
V
OUT
= 3.3 V
V
IN
= 14 V
I
OUT
= 5.0 mA
3.29
3.27
3.25
160
−40
V
out
, OUTPUT VOLTAGE (V)
2.45
TEMPERATURE (°C)
2.49
2.50
2.54
2.55
−20 1400 20 40 60 80 120100
V
OUT
= 2.5 V
V
IN
= 14 V
I
OUT
= 5.0 mA
2.48
2.53
2.47
2.52
2.46
2.51
160
300 350 400
25 °C
−40 °C
I
OUT
= 1 mA
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
0 4 8 12162024
125 °C
25 °C
−40 °C
0.0
0.5
1.0
1.5
2.0
2.5
3.0
1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0
I
OUT
= 1 mA
125 °C
25 °C
−40 °C
NCV8505 Series
http://onsemi.com
8
TYPICAL PERFORMANCE CHARACTERISTICS
0.01
I
out
, OUTPUT CURRENT (mA)
50 100 150 200 250 350 400
100
ESR (W)
10
1.0
0.1
0
Figure 9. Output Stability with Output Voltage Change Figure 10. Output Stability with Output Capacitor
Change
300
V
IN
= 14 V
C
VOUT
= 10 mF
Unstable Region
Stable Region
2.5 V
3.3 V
5.0 V
0.1
I
out
, OUTPUT CURRENT (mA)
50 100 150 200 250 350 400
100
ESR (W)
10
1.0
0 300
5 V version
Unstable Region
Stable Region
C
VOUT
= 0.1 mF
Unstable Region
C
VOUT
= 33 mF*
*There is no unstable lower
region for the 33 mF capacitor
Figure 11. Quiescent Current vs. Output Current Figure 12. Quiescent Current vs. Output Current
Figure 13. Quiescent Current vs. Input Voltage
0
I
Q
, QUIESCENT CURRENT (mA)
0.0
I
OUT
, OUTPUT CURRENT (mA)
0.2
0.4
0.6
0.8
1.0
1.2
2.0
5101520 3025
+25°C
+125°C
−40°C
Figure 14. Quiescent Current vs. Input Voltage
35 40 5045
1.4
1.6
1.8
0
I
Q
, QUIESCENT CURRENT (mA)
0
I
OUT
, OUTPUT CURRENT (mA)
10
20
30
40
50
60
50
100
150 200 300250
+25°C
+125°C
−40°C
350 400 500450
6
I
Q
, QUIESCENT CURRENT (mA)
0
V
IN
, INPUT VOLTAGE (V)
2
4
6
8
10
12
8
10
12 14 1816
T = 25°C
I
out
= 200 mA
20 22 2624
I
out
= 100 mA
I
out
= 50 mA
I
out
= 10 mA
6
I
Q
, QUIESCENT CURRENT (mA)
175
V
IN
, INPUT VOLTAGE (V)
180
185
190
195
200
210
8
10
12 14 1816
T = 25°C
20 22 2624
I
out
= 100 mA
205
NCV8505 Series
http://onsemi.com
9
CIRCUIT DESCRIPTION
REGULATOR CONTROL FUNCTIONS
The NCV8505 contains the microprocessor compatible
control function RESET
(Figure 15).
Figure 15. Reset and Delay Circuit Wave Forms
V
IN
V
OUT
RESET
DELAY
(V
DT
)
Threshold
DELAY
Threshold
RESET
T
d
T
d
RESET Function
A RESET signal (low voltage) is generated as the IC
powers up until V
OUT
is within 1.5% of the regulated output
voltage, or when V
OUT
drops out of regulation,and is lower
than 4.0% below the regulated output voltage. Hysteresis is
included in the function to minimize oscillations.
The RESET
output is an open collector NPN transistor,
controlled by a low voltage detection circuit. The circuit is
functionally independent of the rest of the IC thereby
guaranteeing that the RESET
signal is valid for V
OUT
as low
as 1.0 V.
ENABLE Function
The part stays in a low I
Q
sleep mode when the ENABLE
pin is held low. The part has an internal pull down if the pin
is left floating.
The integrity of the ENABLE pin allows it to be tied to the
battery line through an external resistor. It will withstand
load dump potentials in this configuration.
Figure 16. ENABLE Function
V
IN
V
OUT
GND
NCV8505
ENABLE
V
BAT
Up to 45 V
10 k
DELAY Function
The reset delay circuit provides a programmable (by
external capacitor) delay on the RESET
output lead.
The DELAY lead provides source current (typically 4.0 mA)
to the external DELAY capacitor during the following
proceedings:
1. During Power Up (once the regulation threshold
has been verified).
2. After a reset event has occurred and the device is
back in regulation. The DELAY capacitor is
discharged when the regulation (RESET
threshold)
has been violated. This is a latched incident. The
capacitor will fully discharge and wait for the
device to regulate before going through the delay
time event again.
Voltage Adjust
Figure 17 shows the device setup for a user configurable
output voltage. The feedback to the V
ADJ
pin is taken from
a voltage divider referenced to the output voltage. The loop
is balanced around the Unity Gain threshold (1.30 V
typical).
Figure 17. Adjustable Output Voltage
V
OUT
V
ADJ
NCV8505
15 k
5.1 k
C
OUT
≈5.0 V
1.28 V
P1-P3P4-P6P7-P9P10-P12

NCV8505D2T25R4G

Mfr. #:
Buy NCV8505D2T25R4G
Manufacturer:
ON Semiconductor
Description:
LDO Voltage Regulators MICROPOWER 400
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet