
MP3312 - 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER
MP3312 Rev. 1.02 www.MonolithicPower.com 11
1/13/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
In addition, before chip starts to receive each
command with first falling edge, data line should
keep high level for t
START
(min. 2us)
time. The
transmission of each command is completed with
low level for t
EOS
(min. 2us).Shown in Figure 5.
The ACK signal feedback to master or not is
dependent on RFA bit. If ACK is needed, the
master should have an open-drain output, and
data line should be pulled high by master with a
resistor load.
Figure 5— Data-line Timing when RFA=0
Figure 6—Data-line Timing when RFA=1
If RFA=0, No ACK signal feedback. After all 24
bits data is transferred, data line keeps low for
t
EOS
(min. 2us) delay, and then it is pulled to static
high. Shown as Figure 5.
If RFA=1, ACK signal feedback to master. After
all 24 bits data is transferred, the data line keeps
low for t
ACKval (max. 2us) time ,then data line
should be released to output high impedance and
master is ready to detect the ACK signal from
slave . After t
ACKval, if ACK “false” (1-wire data is
not received successfully), the data line will be
pulled to high directly. After t
ACKval, if ACK “ture”
(1-wire data is received successfully), data line
will be continuously pulled to low V
ACKL (max.
0.4V) by slave for t
ACK (max. 512us) time. The
master reads this low logic, it means chip
received 1-wire data successfully. Then the data
line is pulled to static high. Shown as Figure 6.
MP3312 has a 9-bit DAC for digital dimming
control and the dimming resolution is 1/511. The
default code value of D0 (LSB)-D8(MSB) is
“111111111” when the device is first enabled.
The LED current is dependent on the internal
register value D0-D8 according to below formula:
full
code
ILED ILED
511
=×
ILED
full
is the full scale output current set by R
ISET
to ISET pin. Code is the DEC value of resolution
bit (D0-D8).