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Figure 2—1-wire command structure
1-wire interface defines logic 0 and logic 1 by
comparing the time of the signal low level and
high level, 1 cycle means 1 logic bit. The bit
detection starts with a falling edge on the EN
pin and ends with the next falling edge. Shown
as Figure 3
Low logic (logic 0): t
LOW
3* t
HIGH
High logic (logic 1): t
HIGH
3* t
LOW
Figure 3—1-Wire Bit Definition
The EN pin needs to distinguish EN signal and
digital dimming signal when set up boost driver.
Chip only receives 1-wire signal when EN pin
signal matches 1-wire protocol during 1ms 1-
wire detection window. 1-wire dimming
sequence is described as below, and shown in
Figure 4.
1. Pulling VIN and PWM to high.
2. Pulling data line from low to high for t
DELAY
(1-
wire detection delay time, 100us) and this
rising edge is the start of 1-wire detection
window.
3. After 1-wire detection delay time, pulling data
line to low for more than t
DETECTION
(1-wire
detection time, 260us). Then pulling data
line to high.
4. The sum of 1-wire detection delay time and
1-wire detection time should be less than t
WIN
.
(The time of 1-wire detection window,1ms).
Figure 4—1-Wire Dimming Sequence
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In addition, before chip starts to receive each
command with first falling edge, data line should
keep high level for t
START
(min. 2us)
time. The
transmission of each command is completed with
low level for t
EOS
(min. 2us).Shown in Figure 5.
The ACK signal feedback to master or not is
dependent on RFA bit. If ACK is needed, the
master should have an open-drain output, and
data line should be pulled high by master with a
resistor load.
Figure 5— Data-line Timing when RFA=0
Figure 6—Data-line Timing when RFA=1
If RFA=0, No ACK signal feedback. After all 24
bits data is transferred, data line keeps low for
t
EOS
(min. 2us) delay, and then it is pulled to static
high. Shown as Figure 5.
If RFA=1, ACK signal feedback to master. After
all 24 bits data is transferred, the data line keeps
low for t
ACKval (max. 2us) time ,then data line
should be released to output high impedance and
master is ready to detect the ACK signal from
slave . After t
ACKval, if ACK “false” (1-wire data is
not received successfully), the data line will be
pulled to high directly. After t
ACKval, if ACK “ture”
(1-wire data is received successfully), data line
will be continuously pulled to low V
ACKL (max.
0.4V) by slave for t
ACK (max. 512us) time. The
master reads this low logic, it means chip
received 1-wire data successfully. Then the data
line is pulled to static high. Shown as Figure 6.
MP3312 has a 9-bit DAC for digital dimming
control and the dimming resolution is 1/511. The
default code value of D0 (LSB)-D8(MSB) is
“111111111” when the device is first enabled.
The LED current is dependent on the internal
register value D0-D8 according to below formula:
full
code
ILED ILED
511
ILED
full
is the full scale output current set by R
ISET
to ISET pin. Code is the DEC value of resolution
bit (D0-D8).
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Cycle-by-Cycle Current Limit Protection
MP3312 provides cycle-by-cycle current limit
protection to avoid any damage due to too large
current rating. During startup, the current limit is
clamped to 1A for around 6ms to avoid output
overshoot and inrush current. After that, the
current limit returns back to normal 1.8A.
Open String Protection
Open string protection is achieved by detecting
the VOUT pin. If the LED string is open, the
feedback voltage is lower than the reference
voltage, thus the COMP rises up and keeps
charge the output capacitor until VOUT pin hits
the protection point VOVP. Then the IC stops
switching and shuts down till VIN and EN is reset
for enable again.
Unused LED Channel
In some cases, if one LED current channel is not
used, connect the corresponding LEDx to GND
to remove it from the control loop.
Short String Protection
The MP3312 monitors the LEDX pin voltage to
judge if the short string occurs. If one string is
short, the respective LEDX pin will be pulled up
to the boost output and tolerate high voltage
stress. If the LEDX pin voltage is higher than 5 V
and LED current is larger than 8% full-scale
setting current, the short string condition is
detected and if such condition lasts longer than
8ms, the fault string current source is disabled till
VIN and EN is reset for enable again.
Thermal Shutdown Protection
To prevent the IC operate at exceedingly high
temperature, thermal shutdown is implemented in
this chip by detecting the silicon die temperature.
When the die temperature exceeds the upper
threshold 150, the IC shutdowns and recovers
to normal operation when die temperature drops
below lower threshold. Typically, the hysteresis
value is 25°C.

MP3312GC-Z

Mfr. #:
Manufacturer:
Monolithic Power Systems (MPS)
Description:
LED Lighting Drivers 2.7V-5.5Vin, 38Vo, 2-Channel WLEDDriver
Lifecycle:
New from this manufacturer.
Delivery:
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