FAN6555 PRODUCT SPECIFICATION
4
REV. 1.1.3 8/4/03
Functional Description
The FAN6555 integrates two power MOSFETs that can be
used to source and sink 2A of current while maintaining a
tight voltage regulation. Using the external feedback, the
output can be regulated well within 3% or less, depending on
the external components chosen. Separate voltage supply
inputs have been added to accommodate applications with
various power supplies for the databus and power buses.
Outputs
The output voltage pins (V
L1
, V
L2
) are tied to the databus,
address, or clock lines via an external inductor. See the
Applications section for recommendations. Output voltage
is determined by the V
CCQ
or VREF
IN
inputs.
Inputs
The input voltage pins (V
CCQ
or VREF
IN
) determine the
output voltages (V
L1
or V
L2
) . In the default mode, where
the VREF
IN
pin is floating, the output voltage is 50% of the
V
CCQ
input. V
CCQ
can be the reference voltage for the
databus.
Output voltage can also be selected by forcing a voltage at
the VREF
IN
pin. In this case, the output voltage follows the
voltage at the VREF
IN
input. Simple voltage dividers can be
used in this case to produce a wide variety of output voltages
between 0.7V and V
DD
–0.7V.
VREF Input and Output
The VREF
IN
input can be used to force a voltage at the
outputs (Inputs section, above). The VREF
OUT
pin is an
output pin that is driven by a small output buffer to provide
the V
REF
signal to other devices in the system. The output
buffer is capable of driving several output loads. The output
buffer can handle 3mA.
Other Supply Voltages
Several inputs are provide for the supply voltages: PV
DD1
,
PV
DD2
, AV
CC
, and V
DD
.
The PV
DD1
and PV
DD2
provide the power supply to the
power MOSFETs. V
DD
provides the voltage supply to the
digital sections, while AV
CC
supplies the voltage for the
analog sections. Again, see the Applications section for
recommendations.
Feedback Input
The V
FB
pin is an input that can be used for closed loop
compensation. This input is derived from the voltage output.
See Application section for recommendation.
Figure 1.
16
15
14
13
12
11
10
9
U1
FAN6555
V
DD
PV
DD1
V
L1
P
GND1
P
GND2
V
L2
PV
DD2
D
GND
AV
CC
V
CCQ
VREF
OUT
AGND
SHDN
VREF
IN
V
FB
V
DD
1
2
3
4
5
6
7
8
R3
100kΩ
V
CCQ
VREF
OUT
TPI
V
TT
2.5V TO 4V
SHDN
VREF
IN
GNDGND
TO SDRAMS
C7 1nF
C5
470µF
C4 0.1µF
R4 100kΩ
R5 1kΩ
C9 0.1µF
R2 100Ω
R1 100Ω
C8 0.1µF
C2
0.1µF
C1
820µF
F2V
OS-CON
L1 3.3µH
C3 0.1µF