FAN6555 PRODUCT SPECIFICATION
4
REV. 1.1.3 8/4/03
Functional Description
The FAN6555 integrates two power MOSFETs that can be
used to source and sink 2A of current while maintaining a
tight voltage regulation. Using the external feedback, the
output can be regulated well within 3% or less, depending on
the external components chosen. Separate voltage supply
inputs have been added to accommodate applications with
various power supplies for the databus and power buses.
Outputs
The output voltage pins (V
L1
, V
L2
) are tied to the databus,
address, or clock lines via an external inductor. See the
Applications section for recommendations. Output voltage
is determined by the V
CCQ
or VREF
IN
inputs.
Inputs
The input voltage pins (V
CCQ
or VREF
IN
) determine the
output voltages (V
L1
or V
L2
) . In the default mode, where
the VREF
IN
pin is floating, the output voltage is 50% of the
V
CCQ
input. V
CCQ
can be the reference voltage for the
databus.
Output voltage can also be selected by forcing a voltage at
the VREF
IN
pin. In this case, the output voltage follows the
voltage at the VREF
IN
input. Simple voltage dividers can be
used in this case to produce a wide variety of output voltages
between 0.7V and V
DD
–0.7V.
VREF Input and Output
The VREF
IN
input can be used to force a voltage at the
outputs (Inputs section, above). The VREF
OUT
pin is an
output pin that is driven by a small output buffer to provide
the V
REF
signal to other devices in the system. The output
buffer is capable of driving several output loads. The output
buffer can handle 3mA.
Other Supply Voltages
Several inputs are provide for the supply voltages: PV
DD1
,
PV
DD2
, AV
CC
, and V
DD
.
The PV
DD1
and PV
DD2
provide the power supply to the
power MOSFETs. V
DD
provides the voltage supply to the
digital sections, while AV
CC
supplies the voltage for the
analog sections. Again, see the Applications section for
recommendations.
Feedback Input
The V
FB
pin is an input that can be used for closed loop
compensation. This input is derived from the voltage output.
See Application section for recommendation.
Figure 1.
16
15
14
13
12
11
10
9
U1
FAN6555
V
DD
PV
DD1
V
L1
P
GND1
P
GND2
V
L2
PV
DD2
D
GND
AV
CC
V
CCQ
VREF
OUT
AGND
SHDN
VREF
IN
V
FB
V
DD
1
2
3
4
5
6
7
8
R3
100k
V
CCQ
VREF
OUT
TPI
V
TT
2.5V TO 4V
SHDN
VREF
IN
GNDGND
TO SDRAMS
C7 1nF
C5
470µF
C4 0.1µF
R4 100k
R5 1k
C9 0.1µF
R2 100
R1 100
C8 0.1µF
C2
0.1µF
C1
820µF
F2V
OS-CON
L1 3.3µH
C3 0.1µF
PRODUCT SPECIFICATION FAN6555
REV. 1.1.3 8/4/03 5
Applications
Using the FAN6555 for DDR Bus Termination
The circuit schematic in Figure 1 shows a recommended
approach for constructing a bus terminating solution for a
DDR bus. This circuit can be used in PC memory and Graph-
ics memory applications as shown in Figures 3 and 4. Note
that the FAN6555 can provide the voltage reference (V
REF
)
and terminating voltages (V
TT
). Using the layout
as shown in Figures 5, 6, and 7, and measuring the V
TT
performance using the test setup as described in Figure 8,
the FAN6555 delivered a V
TT
± 20mV for 1A to 2A loads
(see Figure 9). Table 1 provides a recommended parts list.
An alternate application circuit for the FAN6555 is shown in
Figure 2. The number of external components is reduced
compared to the circuit in Figure 1. This is achieved by
replacing four, 0.1µF bypass capacitors with one, low ESR,
10µF ceramic capacitor placed right next to U1. Two 100
resistors are also eliminated. High value, surface-mount
MLC capacitors were not available when the original appli-
cation circuit (Figure 1) was developed. Both application
circuits offer the same electrical performance but the circuit
shown in Figure 2 has a reduced bill-of-materials. Table 2
shows the recommended parts list for the circuit of Figure 2.
Bus Termination Solutions for Others Buses
Table 3 provides a summary of various bus termination V
REF
& V
TT
requirements. The FAN6555 can be used for those
applications.
Figure 2. Alternate Application Circuit
16
15
14
13
12
11
10
9
U1
FAN6555
V
DD
PV
DD1
V
L1
P
GND1
P
GND2
V
L2
PV
DD2
D
GND
AV
CC
V
CCQ
VREF
OUT
AGND
SHDN
VREF
IN
V
FB
V
DD
1
2
3
4
5
6
7
8
R3
100k
V
CCQ
VREF
OUT
V
TT
2.5V TO 4V
SHDN
VREF
IN
GNDGND
TO SDRAMS
C4 1nF
C5
470µF
R1 100k
R2 1k
C2
0.1µF
C1
820µF
F2V
OS-CON
L1 3.3µH
C3 10µF
FAN6555 PRODUCT SPECIFICATION
6 REV. 1.1.3 8/4/03
Figure 3. Complete Termination Solution PC Main Memory (PC Motherboard)
Figure 4. Complete Termination Solution Graphics Memory Bus – AGP Graphics Cards
DATA LINE, CLOCK LINES,
ADDRESS LINES, CONTROL LINES
TERMINATION
RESISTORS
FAN6555
PC CHIP SET
NORTHBRIDGE
TERMINATION
RESISTORS
VTT
VREF
168/184/208-PIN DIMM CONNECTORS
AND SDRAM/SGRAM MODULES
DATA LINE, CLOCK LINES,
ADDRESS LINES, CONTROL LINES
TERMINATION
RESISTORS
3D
GRAPHIC CHIP
TERMINATION
RESISTORS
SO DIMM
AND MODULES
SGRAM
FAN6555
VOLTAGE
REGULATOR
2.5V
VREF
VTT
5V OR 3.3V
AGP/PCI BUS

FAN6555M

Mfr. #:
Manufacturer:
ON Semiconductor / Fairchild
Description:
Switching Controllers 2a DDR Bus Term
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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