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Figure 4 provides a ratio of peak-to-peak output ripple cur-
rent to the inductor current as a function of duty cycle and
the
number of paralleled phases. Pick the corresponding
duty cycle and the number of phases to arrive at the correct
output ripple current ratio value. If a 2-phase operation is
chosen at a duty cycle of 21%, then 0.6 is the ratio. This
0.6 ratio of output ripple current to inductor ripple of 2A
equals 1.2A of effective output ripple current. Refer to
Application Note 77 for a detailed explanation of output
ripple current reduction as a function of paralleled phases.
The output ripple voltage has two components that are
related to the amount of bulk capacitance and effective
series resistance (ESR) of the output bulk capacitance.
Therefore, the output ripple voltage can be calculated with
the known effective output ripple current. The equation:
ΔV
OUT(P-P)
≈ (ΔI
L
/(8•f•m•C
OUT
) + ESR•ΔI
L
), where f
is frequency and m is the number of parallel phases. This
calculation process can be easily accomplished by using
LTpowerCAD™.
Fault Conditions: Current Limit and Overcurrent
Foldback
The LTM4603HV has a current mode controller, which
inherently limits the cycle-by
-cycle inductor current not
only in steady-state operation, but also in response to
transients.
To further limit current in the event of an overload condition,
the LTM4603HV provides foldback current limiting. If the
output voltage falls by more than 50%, then the maximum
output current is progressively lowered to about one sixth
of its full current limit value.
Soft-Start and Tracking
The TRACK/SS pin provides a means to either soft-start
the regulator or track it to a different power supply. A
capacitor on this pin will program the ramp rate of the
output voltage. A 1.5µA current source will charge up the
external soft-start capacitor to 80% of the 0.6V internal
Figure 4. Normalized Output Ripple Current vs Duty Cycle, Dlr = V
O
T/L
I
DUTY CYCLE (V
O
/V
IN
)
0.1 0.15 0.2 0.25 0.350.3 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9
1.00
0.95
0.90
0.85
0.80
0.75
0.70
0.65
0.60
0.55
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
4603HV F04
6-PHASE
4-PHASE
3-PHASE
2-PHASE
1-PHASE
PEAK-TO-PEAK OUTPUT RIPPLE CURRENT
DIr
RATIO =
LTM4603HV
14
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voltage reference minus any margin delta. This will control
the ramp of the internal reference and the output voltage.
The total soft-start time can be calculated as:
t
SOFTSTART
= 0.8 0.6V ± V
OUT(MARGIN)
( )
C
SS
1.5µA
When the RUN pin falls below 1.5V, then the TRACK/SS
pin is reset to allow for proper soft-start control when the
regulator is enabled again. Current foldback and forced
continuous mode are disabled during the soft-start pro
-
cess. The soft-start function can also be used to control
the
output ramp up time, so that another regulator can
be easily tracked to it.
Output Voltage Tracking
Output voltage tracking can be programmed externally
using the TRACK/SS pin. The output can be tracked up and
down with another regulator. The master regulator’s output
is divided down with an external resistor divider that is the
same as the slave regulator’s feedback divider. Figure 5
shows an example of coincident tracking. Ratiometric
modes of tracking can be achieved by selecting different
resistor values to change the output tracking ratio. The
master output must be greater than the slave output for
the tracking to work. Figure 6 shows the coincident output
tracking characteristics.
Run Enable
The RUN pin is used to enable the power module. The
pin has an internal 5.1V Zener to ground. The pin can be
driven with a logic input not to exceed 5V.
The RUN pin can
also be used as an undervoltage lock out
(UVLO)
function by connecting a resistor divider from the
input supply to the RUN pin:
V
UVLO
=
R1
+
R2
R2
1.5V
See the Simplified Block Diagram (Figure 1).
Power Good
The PGOOD pin is an open-drain pin that can be used to
monitor valid output voltage regulation. This pin monitors
a ±10% window around the regulation point and tracks
with margining.
COMP Pin
This pin is the external compensation pin. The module has
already been internally compensated for most output volt
-
ages. Table 2 is provided
for most application requirements.
LTpowerCAD is available for control loop optimization.
PLLIN
The power module has a phase-locked loop comprised
of an internal voltage controlled oscillator and a phase
detector. This allows the internal top MOSFET turn-on
Figure 5. Coincident Tracking Schematic
Figure 6. Coincident Output Tracking Characteristics
V
OUT
V
FB
MARG0
MARG1
V
OUT_LCL
DIFFV
OUT
V
OSNS
+
V
OSNS
PGOOD
MPGM
RUN
COMP
INTV
CC
DRV
CC
TRACK/SS
TRACK CONTROL
PLLIN
LTM4603HV
R
SET
40.2k
100k
R1
40.2k
MASTER
OUTPUT
R2
60.4k
C
OUT
SLAVE OUTPUT
4603HV F05
60.4k FROM
V
OUT
TO V
FB
C
IN
V
IN
f
SETPGNDSGND
V
IN
OUTPUT
VOLTAGE
TIME
4603HV F06
MASTER OUTPUT
SLAVE OUTPUT
LTM4603HV
15
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to be locked to the rising edge of the external clock. The
frequency range is ±30% around the operating frequency
of 1MHz. A pulse detection circuit is used to detect a clock
on the PLLIN pin to turn on the phase-locked loop. The
pulse width of the clock has to be at least 400ns and the
amplitude at least 2V. The PLLIN pin must be driven from a
low impedance source such as a logic gate located close to
the pin. During start-up of the regulator, the phase-locked
loop function is disabled.
INTV
CC
and DRV
CC
Connection
An internal low dropout regulator produces an internal
5V supply that powers the control circuitry and DRV
CC
for driving the internal power MOSFETs. Therefore, if the
system does not have a 5V power rail, the LTM4603HV
can be directly powered by Vin. The gate driver current
through the LDO is about 20mA. The internal LDO power
dissipation can be calculated as:
P
LDO_LOSS
= 20mA•(V
IN
– 5V)
The LTM4603HV also provides the external gate driver
voltage pin DRV
CC
. If there is a 5V rail in the system, it is
recommended to connect DRV
CC
pin to the external 5V
rail. This is especially true for higher input voltages. Do
not apply more than 6V to the DRV
CC
pin. A 5V output can
be used to power the DRV
CC
pin with an external circuit
as shown in Figure 18.
Parallel Operation of the Module
The LTM4603HV device is an inherently current mode
controlled device. Parallel modules will have very good
current sharing. This will balance the thermals on the
design. The voltage feedback equation changes with the
variable n as modules are paralleled:
V
OUT
= 0.6V
60.4k
n
+R
SET
R
SET
n is the number of paralleled modules.
Thermal Considerations and Output Current Derating
The power loss curves in Figures 7 and 8 can be used
in coordination with the load current derating curves in
Figures 9 to 12, and Figures 13 to 16 for calculating an
approximate θ
JA
for the module with various heat sinking
methods. Thermal models are derived from several tem-
perature measurements
at
the bench and thermal modeling
analysis. Thermal Application Note 103 provides a detailed
explanation of the analysis for the thermal models and the
derating curves. Tables 3 and 4 provide a summary of the
equivalent θ
JA
for the noted conditions. These equivalent
θ
JA
parameters are correlated to the measured values,
and are improved with air flow. The case temperature is
maintained at 100°C or below for the derating curves.
Figure 7. 1.5V Power Loss Figure 8. 3.3V Power Loss Figure 9. No Heat Sink
OUTPUT CURRENT (A)
0
2.0
2.5
3 5
4603HV F07
1.5
1.0
1 2
4 6 7
0.5
0
POWER LOSS (W)
12V LOSS
5V LOSS
OUTPUT CURRENT (A)
0
2.0
2.5
3.5
3 5
4603HV F08
1.5
1.0
1 2
4 6 7
0.5
0
3.0
POWER LOSS (W)
24V LOSS
12V LOSS
AMBIENT TEMPERATURE (C)
75
0
MAXIMUM LOAD CURRENT (A)
1
2
3
4
5
6
80 85 90 95
4603HV F09
5V
IN
, 1.5V
OUT
, 0LFM
5V
IN
, 1.5V
OUT
, 200LFM
5V
IN
, 1.5V
OUT
, 400LFM

LTM4603HVEV#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 28V, 6A Step-down Module Regulator with PLL input
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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