LC75808W
www.onsemi.com
7
Pin Functions
Symbol Pin No. Function Active
I/O
Handling
when
unused
S1 to S60 1 to 60
Segment driver outputs.
- O OPEN
COM1 to
COM10
70 to 61
Common driver outputs.
- O OPEN
KS1 to KS6 71 to 76
Key scan outputs.
Although normal key scan timing lines require diodes to be inserted in the timing
lines to prevent shorts, since these outputs are unbalanced CMOS transistor
outputs, these outputs will not be damaged by shorting when these outputs are
used to form a key matrix.
- O OPEN
KI1 to KI5 77 to 81
Key scan inputs.
These pins have built-in pull-down resistors.
H I GND
P1 to P4 82 to 85
General-purpose output ports.
- O OPEN
OSC 95
Oscillator connection.
An oscillator circuit is formed by connecting an external resistor and capacitor at
this pin.
- I/O V
DD
CE 98
Serial data interface connections to the controller. Note that DO, being an open-
drain output, requires a pull-up resistor.
CE: Chip enable
CL: Synchronization clock
DI: Transfer data
DO: Output data
H I
GND
CL 99
I
DI 100 - I
DO 97 - O OPEN
INH
96
Input that turns the display off, disables key scanning, and forces the
general-purpose output ports low.
• When
INH
is low (V
SS
):
• Display off
S1 to S60 = “L” (V
LCD
4).
COM1 to COM10 = “L” (V
LCD
4).
• General-purpose output ports P1 to P4 = low (V
SS
)
• Key scanning is disabled: KS1 to KS6 = low (V
SS
)
• All the key data is reset to low.
• When
INH
is high (V
DD
):
• Display on
• The states of the general-purpose output ports can be set by the PC1 to PC4
control data.
• Key scanning is enabled.
However, serial data can be transferred when the
INH
pin is low.
L I V
DD
TEST 94
This pin must be connected to ground.
- I -
V
LCD
0 88
LCD drive 4/4 bias voltage (high level) supply pin. The level on this pin can be
changed by the display contrast adjustment circuit.
However, (V
LCD
0 - V
LCD
4) must be greater than or equal to 4.5V.
Also, external power must not be applied to this pin since the pin circuit includes
the display contrast adjustment circuit.
- O OPEN
V
LCD
1 89
LCD drive 3/4 bias voltage (middle level) supply pin. This pin can be used to
supply the 3/4 (V
LCD
0 - V
LCD
4) voltage level externally.
- I OPEN
V
LCD
2 90
LCD drive 2/4 bias voltage (middle level) supply pin. This pin can be used to
supply the 2/4 (V
LCD
0 - V
LCD
4) voltage level externally.
- I OPEN
V
LCD
3 91
LCD drive 1/4 bias voltage (middle level) supply pin. This pin can be used to
supply the 1/4 (V
LCD
0 - V
LCD
4) voltage level externally.
- I OPEN
V
LCD
4 92
LCD drive 0/4 bias voltage (low level) supply pin. Fine adjustment of the display
contrast can be implemented by connecting an external variable resistor to this pin.
However, (V
LCD
0 - V
LCD
4) must be greater than or equal to 4.5V, and V
LCD
4
must be in the range 0 V to 1.5V, inclusive.
- I GND
V
DD
86
Logic block power supply connection. Provide a voltage of between 4.5 and 6.0V.
- - -
V
LCD
87
LCD driver block power supply connection. Provide a voltage of between 7.0 and
11.0V when the display contrast adjustment circuit is used and provide a voltage of
between 4.5 and 11.0V when the circuit is not used.
- - -
V
SS
93
Power supply connection. Connect to ground.
- - -
