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CY7C109BN-20ZXCT

P1-P3P4-P6P7-P9
CY7C109BN
CY7C1009BN
Document #: 001-06430 Rev. ** Page 4 of 9
Data Retention Characteristics Over the Operating Range (Low Power version only)
Parameter Description Conditions Min. Max Unit
V
DR
V
CC
for Data Retention No input may exceed V
CC
+ 0.5V
V
CC
= V
DR
= 2.0V,
CE
1
> V
CC
– 0.3V or CE
2
< 0.3V,
V
IN
> V
CC
– 0.3V or V
IN
< 0.3V
2.0 V
I
CCDR
Data Retention Current 150 µA
t
CDR
Chip Deselect to Data Retention Time 0 ns
t
R
Operation Recovery Time 200 µs
Data Retention Waveform
Switching Waveforms
Read Cycle No. 1
[10, 11]
Read Cycle No. 2 (OE Controlled)
[11, 12]
Notes:
10.Device is continuously selected. OE
, CE
1
= V
IL
, CE
2
= V
IH
.
11. WE
is HIGH for read cycle.
12.Address valid prior to or coincident with CE
1
transition LOW and CE
2
transition HIGH.
4.5V4.5V
CE
V
CC
t
CDR
V
DR
>
2V
DATA RETENTION MODE
t
R
PREVIOUS DATA VALID DATA VALID
t
RC
t
AA
t
OHA
ADDRESS
DATA OUT
50%
50%
DATA VALID
t
RC
t
ACE
t
DOE
t
LZOE
t
LZCE
t
PU
HIGH IMPEDANCE
t
HZOE
t
HZCE
t
PD
HIGH
OE
CE
1
I
CC
I
SB
IMPEDANCE
ADDRESS
CE
2
DATA OUT
V
CC
SUPPLY
CURRENT
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CY7C109BN
CY7C1009BN
Document #: 001-06430 Rev. ** Page 5 of 9
Write Cycle No. 1 (CE
1
or CE
2
Controlled)
[13, 14]
Write Cycle No. 2 (WE Controlled, OE HIGH During Write)
[13, 14]
Notes:
13.Data I/O is high impedance if OE
= V
IH
.
14.If CE
1
goes HIGH or CE
2
goes LOW simultaneously with WE going HIGH, the output remains in a high-impedance state.
15.During this period the I/Os are in the output state and input signals should not be applied.
Switching Waveforms (continued)
t
WC
DATA VALID
t
AW
t
SA
t
PWE
t
HA
t
HD
t
SD
t
SCE
t
SCE
CE
1
ADDRESS
CE
2
WE
DATA I/O
t
HD
t
SD
t
PWE
t
SA
t
HA
t
AW
t
SCE
t
SCE
t
WC
t
HZOE
DATA
IN
VALID
CE
1
ADDRESS
CE
2
WE
DATA I/O
OE
NOTE 15
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CY7C109BN
CY7C1009BN
Document #: 001-06430 Rev. ** Page 6 of 9
Write Cycle No. 3 (WE
Controlled, OE LOW)
[14]
Switching Waveforms (continued)
DATA VALID
t
HD
t
SD
t
LZWE
t
PWE
t
SA
t
HA
t
AW
t
SCE
t
SCE
t
WC
t
HZWE
CE
1
ADDRESS
CE
2
WE
DATA I/O
NOTE
15
Truth Table
CE
1
CE
2
OE WE I/O
0
–I/O
7
Mode Power
H X X X High Z Power-Down Standby (I
SB
)
X L X X High Z Power-Down Standby (I
SB
)
L H L H Data Out Read Active (I
CC
)
L H X L Data In Write Active (I
CC
)
L H H H High Z Selected, Outputs Disabled Active (I
CC
)
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P1-P3P4-P6P7-P9

CY7C109BN-20ZXCT

Mfr. #:
Buy CY7C109BN-20ZXCT
Manufacturer:
Cypress Semiconductor
Description:
IC SRAM 1M PARALLEL 32TSOP I
Lifecycle:
New from this manufacturer.
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