Data Sheet ADuM7223
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS5 V OPERATION
All voltages are relative to their respective ground. 4.5 V ≤ V
DD1
5.5 V, 4.5 V ≤ V
DD2
≤ 18 V, unless stated otherwise. All
minimum/maximum specifications apply over T
J
= 40°C to +125°C. All typical specifications are at T
A
= 25°C, V
DD1
= 5 V, V
DD2
= 12 V.
Switching specifications are tested with CMOS signal levels.
Table 1.
Parameter
Symbol
Min
Typ
Max
Test Conditions/Comments
DC SPECIFICATIONS
Input Supply Current, Quiescent
I
DDI (Q)
1.4
2.4
Output Supply Current per Channel, Quiescent I
DDO (Q)
2.3 3.5 mA
Supply Current at 1 MHz
V
DD1
Supply Current I
DD1 (Q)
1.6 2.5 mA Up to 1 MHz, no load
V
DDA
/V
DDB
Supply Current I
DDA (Q)
, I
DDB (Q)
5.6 8.0 mA Up to 1 MHz, no load
Input Currents I
IA
, I
IB
−1 +0.01 +1 µA 0 V ≤ V
IA
, V
IB
≤ V
DD1
Logic High Input Threshold
V
IH
0.7 × V
DD1
Logic Low Input Threshold V
IL
0.3 × V
DD1
V
Logic High Output Voltages V
OAH
, V
OBH
V
DD2
− 0.1 V
DD2
V I
Ox
= −20 mA, V
Ix
= V
IxH
Logic Low Output Voltages V
OAL
, V
OBL
0.0 0.15 V I
Ox
= 20 mA, V
Ix
= V
IxL
Undervoltage Lockout, V
DD1
Supply
Positive Going Threshold V
DD1UV+
2.8 V
Negative Going Threshold V
DD1UV−
2.6 V
Hysteresis V
DD1UVH
0.2 V
Undervoltage Lockout, V
DD2
Supply
Positive Going Threshold V
DD2UV+
4.1 4.4 V A-Grade
Negative Going Threshold V
DD2UV
3.2 3.6 V A-Grade
Hysteresis
V
DD2UVH
0.5
A-Grade
Positive Going Threshold V
DD2UV+
6.9 7.4 V B-Grade
Negative Going Threshold V
DD2UV−
5.7 6.2 V B-Grade
Hysteresis V
DD2UVH
0.7 V B-Grade
Positive Going Threshold V
DD2UV+
10.5 11.1 V C-Grade
Negative Going Threshold V
DD2UV−
9.0 9.6 V C-Grade
Hysteresis
V
DD2UVH
0.9
C-Grade
Output Short-Circuit Pulsed Current
1
I
OA(SC)
,I
OB(SC)
2.0 4.0 A V
DD2
= 12 V
Output Source Resistance R
OA
, R
OB
0.25 0.95 1.5 Ω V
DD2
= 12 V, I
Ox
= −250 mA
Output Sink Resistance R
OA
, R
OB
0.55 0.6 1.35 Ω V
DD2
= 12 V, I
Ox
= 250 mA
THERMAL SHUTDOWN TEMPERATURES
Junction Temperature Shutdown Rising Edge T
JR
150 °C
Junction Temperature Shutdown Falling Edge T
JF
140 °C
SWITCHING SPECIFICATIONS See Figure 16
Pulse Width
2
PW 50 ns C
L
= 2 nF, V
DD2
= 12 V
Maximum Data Rate
3
1 MHz C
L
= 2 nF, V
DD2
= 12 V
Propagation Delay
4
t
DHL
, t
DLH
19 40 62 ns C
L
= 2 nF, V
DD2
= 12 V
ADuM7223A
25
46
68
C
L
= 2 nF, V
DD2
= 4.5 V
Propagation Delay Skew
5
t
PSK
12 ns C
L
= 2 nF, V
DD2
= 12 V
Rev. A | Page 3 of 16
ADuM7223 Data Sheet
Rev. A | Page 4 of 16
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
Channel-to-Channel Matching
6
t
PSKCD
V
DD2
= 12 V 1 8.5 ns C
L
= 2 nF
V
DD2
= 4.5 V 1 8.5 ns C
L
= 2 nF; A-Grade Only
Output Rise/Fall Time (10% to 90%) t
R
/t
F
1 12 24 ns C
L
= 2 nF, V
DD2
= 12 V
Dynamic Input Supply Current per Channel I
DDI (D)
0.05 mA/Mbps V
DD2
= 12 V
Dynamic Output Supply Current per Channel I
DDO (D)
1.65 mA/Mbps V
DD2
= 12 V
Refresh Rate f
r
1.2 Mbps V
DD2
= 12 V
1
Short-circuit duration less than 1 μs. Average power must conform to the limit shown under the Absolute Maximum Ratings.
2
The minimum pulse width is the shortest pulse width at which the specified timing parameter is guaranteed.
3
The maximum data rate is the fastest data rate at which the specified timing parameter is guaranteed.
4
t
DLH
propagation delay is measured from the time of the input rising logic high threshold, V
IH
, to the output rising 10% level of the V
Ox
signal. t
DHL
propagation delay is
measured from the input falling logic low threshold, V
IL
, to the output falling 90% threshold of the V
Ox
signal. See Figure 16 for waveforms of propagation delay parameters.
5
t
PSK
is the magnitude of the worst-case difference in t
DLH
and/or t
DHL
that is measured between ADuM7223 units at the same operating temperature, supply voltages,
and output load within the recommended operating conditions. See Figure 16 for waveforms of propagation delay parameters.
6
Channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation
barrier.
ELECTRICAL CHARACTERISTICS—3.3 V OPERATION
All voltages are relative to their respective ground. 3.0 V ≤ V
DD1
≤ 3.6 V, 4.5 V ≤ V
DD2
≤ 18 V, unless stated otherwise. All
minimum/maximum specifications apply over T
J
= −40°C to 125°C. All typical specifications are at T
A
= 25°C, V
DD1
= 3.3 V, V
DD2
= 12 V.
Switching specifications are tested with CMOS signal levels.
Table 2.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC SPECIFICATIONS
Input Supply Current, Quiescent I
DDI (Q)
0.87 1.4 mA
Output Supply Current per Channel, Quiescent I
DDO (Q)
2.3 3.5 mA
Supply Current at 1 MHz
V
DD1
Supply Current I
DD1 (Q)
1.1 1.5 mA Up to 1 MHz, no load
V
DDA
/V
DDB
Supply Current I
DDA (Q)
, I
DDB (Q)
5.6 8.0 mA Up to 1 MHz, no load
Input Currents I
IA
, I
IB
−1 +0.01 +1 μA 0 V ≤ V
IA
, V
IB
V
DD1
Logic High Input Threshold V
IH
0.7 × V
DD1
V
Logic Low Input Threshold V
IL
0.3 × V
DD1
V
Logic High Output Voltages V
OAH
, V
OAH
V
DD2
− 0.1 V
DD2
V I
Ox
= −20 mA, V
Ix
= V
IxH
Logic Low Output Voltages V
OAL
, V
OBL
0.0 0.15 V I
Ox
= 20 mA, V
Ix
= V
IxL
Undervoltage Lockout, V
DD1
Supply
Positive Going Threshold V
DD1UV+
2.8 V
Negative Going Threshold V
DD1UV−
2.6 V
Hysteresis V
DD1UVH
0.2 V
Undervoltage Lockout, V
DD2
Supply
Positive Going Threshold V
DD2UV+
4.1 4.4 V A-Grade
Negative Going Threshold V
DD2UV−
3.2 3.6 V A-Grade
Hysteresis V
DD2UVH
0.5 V A-Grade
Positive Going Threshold V
DD2UV+
6.9 7.4 V B-Grade
Negative Going Threshold V
DD2UV−
5.7 6.2 V B-Grade
Hysteresis V
DD2UVH
0.7 V B-Grade
Positive Going Threshold V
DD2UV+
10.5 11.2 V C-Grade
Negative Going Threshold V
DD2UV−
9.0 9.6 V C-Grade
Hysteresis V
DD2UVH
0.9 V C-Grade
Output Short-Circuit Pulsed Current
1
I
OA(SC)
, I
OB(SC)
2.0 4.0 A V
DD2
= 12 V
Output Source Resistance R
OA
, R
OB
0.25 0.95 1.5 Ω V
DD2
= 12 V, I
Ox
= −250 mA
Output Sink Resistance R
OA
, R
OB
0.55 0.6 1.35 Ω V
DD2
= 12 V, I
Ox
= 250 mA
Data Sheet ADuM7223
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
THERMAL SHUTDOWN TEMPERATURES
Junction Temperature Shutdown Rising Edge T
JR
150 °C
Junction Temperature Shutdown Falling Edge T
JF
140 °C
SWITCHING SPECIFICATIONS See Figure 16
Pulse Width
2
PW 50 ns C
L
= 2 nF, V
DD2
= 12 V
Maximum Data Rate
3
1 MHz C
L
= 2 nF, V
DD2
= 12 V
Propagation Delay
4
t
DHL
, t
DLH
25 44 64 ns C
L
= 2 nF, V
DD2
= 12 V
ADuM7223A
28
49
71
C
L
= 2 nF, V
DD2
= 4.5 V
Propagation Delay Skew
5
t
PSK
12 ns C
L
= 2 nF, V
DD2
= 12 V
Channel-to-Channel Matching
6
V
DD2
= 12 V t
PSKCD
1 8.5 ns C
L
= 2 nF
V
DD2
= 4.5 V t
PSKCD
1 8.5 ns C
L
= 2 nF; A-Grade Only
Output Rise/Fall Time (10% to 90%) t
R
/t
F
1 12 24 ns C
L
= 2 nF, V
DD2
= 12 V
Dynamic Input Supply Current per Channel
I
DDI (D)
0.05
V
DD2
= 12 V
Dynamic Output Supply Current per Channel I
DDO (D)
1.65 mA/Mbps V
DD2
= 12 V
Refresh Rate f
r
1.1 Mbps V
DD2
= 12 V
1
Short-circuit duration less than 1 µs. Average power must conform to the limit shown under the Absolute Maximum Ratings.
2
The minimum pulse width is the shortest pulse width at which the specified timing parameter is guaranteed.
3
The maximum data rate is the fastest data rate at which the specified timing parameter is guaranteed.
4
t
DLH
propagation delay is measured from the time of the input rising logic high threshold, V
IH
, to the output rising 10% level of the V
Ox
signal. t
DHL
propagation delay is
measured from the input falling logic low threshold, V
IL
, to the output falling 90% threshold of the V
Ox
signal. See Figure 16 for waveforms of propagation delay
parameters.
5
t
PSK
is the magnitude of the worst-case difference in t
DLH
and/or t
DHL
that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions. See Figure 16 for waveforms of propagation delay parameters.
6
Channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation
barrier.
Rev. A | Page 5 of 16

ADUM7223ACCZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Gate Drivers Isolated Precision Gate Drivr 4A Output
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New from this manufacturer.
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