IDT8SLVD1208I Data Sheet 1:8, LVDS OUTPUT FANOUT BUFFER
IDT8SLVD1208NBGI REVISION A MAY 1, 2013 16 ©2013 Integrated Device Technology, Inc.
Power Considerations
This section provides information on power dissipation and junction temperature for the IDT8SLVD1208I. Equations and example calculations
are also provided.
1. Power Dissipation.
The total power dissipation for the IDT8SLVD1208I is the sum of the core power plus the output power dissipation due to the load. The following
is the power dissipation for V
DD
= 2.5V + 5% = 2.625V, which gives worst case results.
The maximum current at 85°C is as follows:
I
DD_MAX
= 170mA
•Power
(core)MAX
= V
DD_MAX
* I
DD_MAX
= 2.625V * 170mA = 446.25mW
Total Power
_MAX
= 446.25mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj =
JA
* Pd_total + TA
Tj = Junction Temperature
JA
= Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A
= Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
JA
must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 46.2°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.446W * 46.2°C/W = 105.6°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 6. Thermal Resistance
JA
for 28 Lead VFQFN, Forced Convection
JA
at 0 Air Flow
Meters per Second 012
Multi-Layer PCB, JEDEC Standard Test Boards 46.2°C/W 39.4C/W 37.1°C/W
