LTC6910-1
LTC6910-2/LTC6910-3
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Analog Input and DC Levels
As described in Tables 1, 2 and 3 and under Pin Functions,
the IN pin presents a variable input resistance returned
internally to a potential equal to that at the AGND pin
(within a small offset-voltage error). This input resistance
varies with digital gain setting, becoming infinite (open
circuit) at “zero” gain (digital input 000), and as low as 1k
at high gain settings. It is important to allow for this
input-resistance variation with gain, when driving the
LTC6910-X from other circuitry. Also, as the gain in-
creases above unity, the DC linear input-voltage range
(corresponding to rail-to-rail swing at the OUT pin) shrinks
toward the AGND potential. The output swings positive or
negative around the AGND potential (in the opposite
direction from the input, because the gain is inverting).
AC-Coupled Operation
Adding a capacitor in series with the IN pin makes the
LTC6910-X into an AC-coupled amplifier, suppressing the
source’s DC level (and even minimizing the offset voltage
from the LTC6910-X itself). No further components are
required because the input of the LTC6910-X biases itself
correctly when a series capacitor is added. The IN pin
connects to an internal variable resistor (and floats when
DC open-circuited to a well defined voltage equal to the
AGND input voltage at nonzero gain settings). The value of
this internal input resistor varies with gain setting over a
total range of about 1k to 10k, depending on version (the
rightmost columns of Table 1, Table 2 and Table 3).
Therefore, with a series input capacitor the low frequency
cutoff will also vary with gain. For example, for a low
frequency corner of 1kHz or lower, use a series capacitor
of 0.16µF or larger. A 0.16µF capacitor has a reactance of
1k at 1kHz, giving a 1kHz lower –3dB frequency for gain
settings of 10V/V through 100V/V in the LTC6910-1. If the
LTC6910-1 is operated at lower gain settings with an
0.16µF input capacitor, the higher input resistance will
reduce the lower corner frequency down to 100Hz at a gain
setting of 1V/V. These frequencies scale inversely with the
value of the input capacitor.
Note that operating the LTC6910-X in zero gain mode
(digital inputs 000) open circuits the IN pin and this
demands some care if employed with a series input
capacitor. When the chip enters the zero gain mode, the
opened IN pin tends to freeze the voltage across the
capacitor to the value it held just before the zero gain state.
This can place the IN pin at or near the DC potential of a
supply rail (the IN pin may also drift to a supply potential
in this state due to small junction leakage currents). To
prevent driving the IN pin outside the supply limit and
potentially damaging the chip, avoid AC input signals in
the zero gain state with a series capacitor. Also, switching
later to a nonzero gain value will cause a transient pulse at
the output of the LTC6910-X (with a time constant set by
the capacitor value and the new LTC6910-X input resis-
tance value). This occurs because the IN pin returns to the
AGND potential and transient current flows to charge the
capacitor to a new DC drop.
SNR and Dynamic Range
The term “dynamic range” is much used (and abused)
with signal paths. Signal-to-noise ratio (SNR) is an unam-
biguous comparison of signal and noise levels, measured
in the same way and under the same operating conditions.
In a variable gain amplifier, however, further characteriza-
tion is useful because both noise and maximum signal
level in the amplifier will vary with the gain setting, in
general. In the LTC6910-X, maximum output signal is
independent of gain (and is near the full power supply
voltage, as detailed in the Swing sections of the Electrical
Characteristics table). The maximum input level falls with
increasing gain, and the input-referred noise falls as well
(as listed also in the table). To summarize the useful signal
range in such an amplifier, we define Dynamic Range (DR)
as the ratio of maximum input (at unity gain) to minimum
input-referred noise (at maximum gain). (These two num-
bers are measured commensurately, in RMS Volts.
For deterministic signals such as sinusoids, 1V
RMS
=
2.828V
P-P
.) This DR has a physical interpretation as the
range of signal levels that will experience an SNR above
unity V/V or 0dB. At a 10V total power supply, DR in the
LTC6910-1 (gains 0V to 100V/V) is typically 120dB (the
ratio of a nominal 9.9V
P-P
, or 3.5V
RMS
, maximum input to
the 3.4µV
RMS
high gain input noise). The corresponding
DR for the LTC6910-2 (gains 0V to 64V) is also 120dB; for
APPLICATIO S I FOR ATIO
WUUU
LTC6910-1
LTC6910-2/LTC6910-3
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TYPICAL APPLICATIO S
U
the LTC6910-3 (gains 0V to 7V/V) it is 117dB. The SNR
from an amplifier is the ratio of input level to input-
referred noise, and can be 110dB with the LTC6910 family
at unity gain.
Construction and Instrumentation Cautions
Electrically clean construction is important in applications
seeking the full dynamic range of the LTC6910-X ampli-
fier. Short, direct wiring will minimize parasitic capaci-
tance and inductance. High quality supply bypass capaci-
tors of 0.1µF near the chip provide good decoupling from
a clean, low inductance power source. But several cm of
wire (i.e., a few microhenrys of inductance) from the
power supplies, unless decoupled by substantial capaci-
tance (10µF) near the chip, can cause a high-Q LC
resonance in the hundreds of kHz in the chip’s supplies or
ground reference. This may impair circuit performance at
those frequencies. A compact, carefully laid out printed
circuit board with a good ground plane makes a
significant difference in minimizing distortion. Finally,
equipment to measure amplifier performance can itself
introduce distortion or noise floors. Checking for these
limits with a wire replacing the chip is a prudent routine
procedure.
Expanding an ADC’s Dynamic Range
Figure 6 shows a compact data acquisition system for
wide ranging input levels. This figure combines an
LTC6910-X programmable amplifier (8-lead TSOT-23)
with an LTC1864 analog-to-digital converter (ADC) in an
5
1
499
270pF
LTC1864
3
V
IN
AGND
GAIN
CONTROL
1µF
6910 F04
6
4
LTC6910-X
7
8
5V
0.1µF
2
1µF
ADC
CONTROL
V
REF
IN
+
IN
GND
5V
V
CC
SCK
SDO
CONV
Figure 6. Expanding an ADC’s Dynamic Range
8-lead MSOP. This ADC has 16-bit resolution and a maxi-
mum sampling rate of 250ksps. An LTC6910-1, for ex-
ample, expands the ADC’s input amplitude range by 40dB
while operating from the same single 5V supply. The 499
resistor and 270pF capacitor couple cleanly between the
LTC6910-X’s output and the switched-capacitor input of
the LTC1864. The 270pF capacitor should be an NPO or
X7R type, and lead length and inductance in the connec-
tions to the LTC1864 inputs must be minimized, to achieve
the full performance capability of this circuit. (See LTC
1864 data sheet for further general information.)
At a gain setting of 10V/V in an LTC6910-1 (digital input
100) and a 250ksps sampling rate in the LTC1864, a 10kHz
input signal at 60% of full scale shows a THD of
87dB at the digital output of the ADC. 100kHz input
signals under the same conditions produce THD values
around –75dB. Noise effects (both random and quantiza-
tion) in the ADC are divided by the gain of the amplifier
when referred to V
IN
in Figure 4. Because of this, the circuit
can acquire a signal that is 40dB down from full scale of
5V
P-P
with an SNR of over 70dB. Such performance from
an ADC alone (70 + 40 = 110dB of useful dynamic range at
250ksps), if available, would be far more expensive.
Low Noise AC Amplifier with Programmable Gain
and Bandwidth
Analog data acquisition can exploit band limiting as well as
gain to suppress unwanted signals or noise. Tailoring an
analog front end to both the level and bandwidth of each
source maximizes the resulting SNR.
LTC6910-1
LTC6910-2/LTC6910-3
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TYPICAL APPLICATIO
U
Figure 7 shows a block diagram and Figure 8 the practical
circuit for a low noise amplifier with gain and bandwidth
independently programmable over 100:1 ranges. One
LTC6910-X controls the gain and another controls the
bandwidth. An LT1884 dual op amp forms an integrating
lowpass loop with capacitor C2 to set the programmable
upper corner frequency. The LT1884 also supports rail-to-
rail output swings over the total supply voltage range of
2.7V to 10.5V. AC coupling through capacitor C1 estab-
+
+
+
+
V
IN
C1
GAIN CONTROL PGA
(GAIN A)
V
OUT
= (GAIN A)V
IN
BANDWIDTH CONTROL PGA
(GAIN B)
GAIN = –1
C2
R1
R2
V
OUT
6910 F05
1
2πR1C1
BANDWIDTH
1
R2
(GAIN B)
2π C2
Figure 7. Block Diagram of an AC Amplifier with Programmable Gain and Bandwidth
lishes a fixed low frequency corner of 1Hz, which can be
adjusted by changing C1. Alternatively, shorting C1 makes
the amplifier DC coupled. (If DC gain is not needed,
however, the AC coupling suppresses several error sources:
any shifts in DC levels, low frequency noise and all
amplifier DC offset voltages other than the low internally
trimmed LT1884 offset in the integrating amplifier. If
desired, another coupling capacitor in series with the input
can relax the requirements on DC input level as well.)

LTC6910-3HTS8#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Special Purpose Amplifiers Digly Controlled Progmable Gain Amps in
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