Applications Information
Operating Considerations for
High-Voltage Supply
The MAX4731/MAX4732/MAX4733 operate to +11V
with some precautions. The absolute maximum rating
for V+ is +12V (referenced to GND). When operating
near this region, bypass V+ with a minimum 0.1µF
capacitor to ground as close to the IC as possible.
Logic Levels
The MAX4731/MAX4732/MAX4733 are TTL compatible
when powered from a single +5V supply. When pow-
ered from other supply voltages, the logic inputs should
be driven rail-to-rail. For example, with a +11V supply,
IN1 and IN2 should be driven low to 0V and high to
11V. With a +3.3V supply, IN1 and IN2 should be dri-
ven low to 0V and high to 3.3V. Driving IN1 and IN2 rail-
to-rail minimizes power consumption.
MAX4731/MAX4732/MAX4733
50
Ω,
Dual SPST Analog Switches in UCSP
_______________________________________________________________________________________ 7
Pin Description
Typical Operating Characteristics (continued)
(T
A
= +25°C, unless otherwise noted.)
TURN-ON/OFF TIME
vs. TEMPERATURE
MAX4731-33 toc10
TEMPERATURE (
°
C)
t
ON/OFF
(ns)
6040-20 0 20
10
20
30
40
50
60
70
80
0
-40 80
t
ON
,
V+ = +3.0V
t
ON
,
V+ = +5.0V
t
OFF
,
V+ = +3.0V
t
OFF
,
V+ = +5.0V
FREQUENCY RESPONSE
MAX4731-33 toc11
FREQUENCY (Hz)
LOSS (dB)
100M10M1M100k
-100
-80
-60
-40
-20
0
-120
10k 1G
ON-LOSS
V+ = +3V
OFF-ISOLATION
CROSSTALK
TOTAL HARMONIC DISTORTION
vs. FREQUENCY
MAX4731-33 toc12
FREQUENCY (Hz)
THD (%)
10k1k100
0.001
0.01
0.1
1
0.0001
10 100k
V
COM
= 2V
P-P
BW = 30kHz
R
L
= 1k
V+ = +3.0V
R
L
= 1k
V+ = +5.0V
R
L
= 100k
V+ = +3.0V
R
L
= 100k
V+ = +5.0V
PIN
MAX4731 MAX4732 MAX4733
UCSP
µMAX/
TDFN
UCSP
µMAX/
TDFN
UCSP
µMAX/
TDFN
NAME FUNCTION
A1 1 —— A1 1 NO1 Analog-Switch Normally Open Terminal
A2 2 A2 2 A2 2 COM1 Analog-Switch Common Terminal
A3 4 A3 4 A3 4 GND Ground. Connect to digital ground.
B1 7 B1 7 B1 7 IN1 Logic-Control Digital Input
B3 3 B3 3 B3 3 IN2 Logic-Control Digital Input
C1 8 C1 8 C1 8 V+ Positive Supply Voltage Input
C2 6 C2 6 C2 6 COM2 Analog-Switch Common Terminal
C3 5 —— NO2 Analog-Switch Normally Open Terminal
——A1 1 ——NC1 Analog-Switch Normally Closed Terminal
——C3 5 C3 5 NC2 Analog-Switch Normally Closed Terminal
EP (TDFN
onl
y)
EP (TDFN
onl
y)
EP (TDFN
onl
y)
EP Exposed Pad. Connect to V+.
MAX4731/MAX4732/MAX4733
Analog Signal Levels
Analog signals that range over the entire supply voltage
(GND to V+) pass with very little change in R
ON
(see
Typical Operating Characteristics). The bidirectional
switches allow NO_, NC_, and COM_ connections to be
used as either inputs or outputs.
Power-Supply Sequencing and
Overvoltage Protection
CAUTION: Do not exceed the absolute maximum
ratings. Stresses beyond the listed ratings can
cause permanent damage to the devices.
Proper power-supply sequencing is recommended for
all CMOS devices. Always apply V+ before applying
analog signals, especially if the analog signal is not
current limited. If this sequencing is not possible, and if
the analog inputs are not current limited to < 20mA,
add a small-signal diode, D1, as shown in Figure 1. If
the analog signal can dip below GND, add D2. Adding
protection diodes reduces the analog signal range to a
diode drop (about 0.7V) below V+ (for D1), and to a
diode drop above ground (for D2). Leakage is unaffect-
ed by adding the diodes. On-resistance increases
slightly at low supply voltages. Maximum supply volt-
age (V+) must not exceed +11V.
Adding protection diodes causes the logic thresholds to
be shifted relative to the power-supply rails. The most
significant shift occurs when using low supply voltages
(+5V or less). With a +5V supply, TTL compatibility is not
guaranteed when protection diodes are added. Driving
IN1 and IN2 all the way to the supply rails (i.e., to a
diode drop higher than the V+ pin, or to a diode drop
lower than the GND pin) is always acceptable.
Protection diodes D1 and D2 also protect against some
overvoltage situations. Using the circuit in Figure 1, no
damage results if the supply voltage is below the
absolute maximum rating (+12V) and if a fault voltage
up to the absolute maximum rating (V+ + 0.3V) is
applied to an analog signal terminal.
UCSP Applications Information
For the latest application details on USCP construction,
dimensions, tape carrier information, printed circuit
board techniques, bump-pad layout, and recommend-
ed reflow temperature profile as well as the latest infor-
mation on reliability testing results, go to the Maxim
web site at www.maxim-ic.com/ucsp to find the
Application Note: UCSP—A Wafer-Level Chip-Scale
Package.
50
Ω,
Dual SPST Analog Switches in UCSP
8 _______________________________________________________________________________________
MAX4731
MAX4732
MAX4733
NO_ COM_
GND
V+
*INTERNAL PROTECTION DIODES.
D2
D1
EXTERNAL BLOCKING DIODE
EXTERNAL BLOCKING DIODE
GND
V+
*
*
*
*
Figure 1. Overvoltage Protection Using External Blocking Diodes
Test Circuits/Timing Diagrams
MAX4731/MAX4732/MAX4733
50
Ω,
Dual SPST Analog Switches in UCSP
_______________________________________________________________________________________ 9
Test Circuits/Timing Diagrams (continued)
50%
V
IL
LOGIC
INPUT
R
L
300
IN_
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
(
R
L
)
V
N_
V
IH
t
OFF
0V
NO_
OR NC_
0.9 x V
OUT
0.9 x V
OUT
t
ON
V
OUT
SWITCH
OUTPUT
LOGIC
INPUT
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
V+
COM_
C
L
35pF
V+
V
OUT
MAX4731
MAX4732
MAX4733
GND
R
L
+ R
ON
t
r
< 5ns
t
f
< 5ns
V
OUT
= V
N_
Figure 2. Switching Time
50%
0.9 x V
0UT1
V+
0V
0V
LOGIC
INPUT
SWITCH
OUTPUT 2
(V
OUT2
)
0V
0.9 x V
OUT2
t
BBM
t
BBM
LOGIC
INPUT
R
L2
300
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
NC2
IN2
IN1
NO1
V
OUT2
V+
V+
C
L2
35pF
V
N_
R
L1
300
V
OUT1
C
L1
35pF
COM1
COM2
SWITCH
OUTPUT 1
(V
OUT1
)
MAX4733
t
r
< 5ns
t
f
< 5ns
Figure 3. Break-Before-Make Interval (MAX4733 only)
V
GEN
GND
COM
C
L
1nF
V
OUT
V+
V
OUT
IN
OFF
ON
OFF
V
OUT
Q = (V
OUT
)(C
L
)
NC_
OR NO_
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
OFF
ON
OFF
IN
V
IL
TO V
IH
V+
R
GEN
IN_
MAX4731
MAX4732
MAX4733
Figure 4. Charge Injection

MAX4733EUA+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Analog Switch ICs 50Ohm Dual SPST Analog Switch
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union