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FN7376.2
January 31, 2005
Applications Information
The EL5001, a six channel high performance buffer, is
directed primarily as a clock driver to LPTS LCD display
applications. The six input channels are grouped into one
group of four inputs and one group of two inputs each with a
single pin (INV1 or INV2) to toggle the polarity from inverting
to non-inverting. Each channel consists of a single N-
channel low side driver and single P-channel high side
driver. These 11 devices pull the output to either the high or
low voltage on V
H
and V
L
respectively, depending on the
logic input signal.
A common 3-state pin is available that when activated will
pull all 6-channel outputs to the high impedance state.
Enable and disable pins turn shutdown both inputs and
outputs. Timing plots for 3-state, enable, and disable
functions are included in the characterization
documentation.
The EL5001 is available in either a 20-pin HTSSOP or QFN
(4mm x 4mm) packages to provide a choice for power
dissipation considerations.
Supply Voltage and Input Compatibility
The EL5001 is designed to operate at a maximum potential
range from 0V to 18V. Because the EL5001 does not contain
a true analog switch, the positive supply must always be 4V
higher than the negative supply.
All input pins are compatible with both 3V and 5V CMOS
signals. With the positive supply set to V
S
= 5V the EL5001
is compatible with TTL inputs.
Power Supply Bypassing
Due to the high switching currents generated by the EL5001
power supply bypassing is very important on both the
positive and negative supplies. A 4.7µF tantalum capacitor
can be used in parallel with a 0.1µF low-inductance ceramic
MLC capacitor. As with all bypass components, these should
be placed as close as possible to the supply pins. We also
recommend the V
L
and V
H
pins have some level of
bypassing especially when the device is driving highly
capacitive loads.
Power Dissipation Calculation
When switching at high speeds, or driving heavy loads, the
EL5001 drive capability is limited by the rise in die
temperature brought about by internal power dissipation. For
reliable operation die temperature must be kept below
T
JMAX
(125°C). It is necessary to calculate the power
dissipation for a given application prior to selecting package
type.
Power dissipation may be calculated:
where:
V
S
= Total power supply to the EL5001 (from V
S
+ to V
S
-)
V
OUT
= Swing on the output (V
H
- V
L
)
C
L
= Load capacitance
C
INT
= Internal load capacitance (80pF max)
I
S
= Quiescent supply current (3mA max)
f = Frequency
Having obtained the application's power dissipation, the
maximum junction temperature can be calculated:
where:
T
JMAX
= Maximum junction temperature (125°C)
T
MAX
= Maximum ambient operating temperature
PD = Power dissipation calculated above
JA
= Thermal resistance, junction to ambient, of the
application (package + PCB combination)
PD V
S
I
S
4
1
+ C
INT
V
S
2
f C
L
V
OUT
2
f +=
EL5001
