OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

74HCT161DB,112

P1-P3P4-P6P7-P9P10-P12
December 1990 10
Philips Semiconductors Product specification
Presettable synchronous 4-bit binary
counter; asynchronous reset
74HC/HCT161
t
su
set-up time
D
n
to CP
18 8 23 27 ns 4.5 Fig.11
t
su
set-up time
PE to CP
30 17 38 45 ns 4.5 Fig.11
t
su
set-up time
CEP, CET to CP
40 17 50 60 ns 4.5 Fig.12
t
h
hold time
D
n
, PE, CEP,
CET to CP
0 −7 0 0 ns 4.5 Figs 11 and 12
f
max
maximum clock pulse
frequency
23 41 18 15 MHz 4.5 Fig.8
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HCT
V
CC
(V)
WAVEFORMS
+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
December 1990 11
Philips Semiconductors Product specification
Presettable synchronous 4-bit binary
counter; asynchronous reset
74HC/HCT161
AC WAVEFORMS
Fig.8 Waveforms showing the clock (CP) to outputs (Q
n
, TC) propagation delays, the clock pulse width, the
output transition times and the maximum clock frequency.
(1) HC : V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
Fig.9 Waveforms showing the master reset (MR) pulse width, the master reset to output (Q
n
, TC) propagation
delays and the master reset to clock (CP) removal time.
(1) HC : V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
Fig.10 Waveforms showing the input (CET) to output (TC) propagation delays and output transition times.
(1) HC : V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
December 1990 12
Philips Semiconductors Product specification
Presettable synchronous 4-bit binary
counter; asynchronous reset
74HC/HCT161
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”
.
Fig.11 Waveforms showing the set-up and hold times for the input (D
n
) and parallel enable input PE.
The shaded areas indicate when the input is permitted to change
for predictable output performance.
(1) HC : V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
Fig.12 Waveforms showing the CEP and CET set-up and hold times.
The shaded areas indicate when the input is
permitted to change for predictable output
performance.
(1) HC : V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
P1-P3P4-P6P7-P9P10-P12

74HCT161DB,112

Mfr. #:
Buy 74HCT161DB,112
Manufacturer:
NXP Semiconductors
Description:
Counter ICs SYNC 4-BIT BINARY
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet