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PHB222NQ04LT,118

P1-P3P4-P6P7-P9P10-P12P13-P13
PHP/PHB222NQ04LT
N-channel TrenchMOS™ logic level FET
Rev. 01 — 13 May 2004 Product data
1. Product profile
1.1 Description
Logic level N-channel enhancement mode field-effect transistor in a plastic package
using TrenchMOS™ technology.
1.2 Features
1.3 Applications
1.4 Quick reference data
2. Pinning information
[1] It is not possible to make connection to pin 2 of the SOT404 package.
■ Logic level threshold ■ Very low on-state resistance.
■ Motors, lamps, solenoids ■ Uninterruptible power supplies
■ DC-to-DC converters ■ General industrial applications.
■ V
DS
≤ 40 V ■ I
D
≤ 75 A
■ P
tot
≤ 300 W ■ R
DSon
≤ 2.8 mΩ.
Table 1: Pinning - SOT78 (TO-220AB) and SOT404 (D
2
-PAK), simplified outline and symbol
Pin Description Simplified outline Symbol
1 gate (g)
SOT78 (TO-220AB)
SOT404 (D
2
-PAK)
2 drain (d)
[1]
3 source (s)
mb mounting base;
connected to
drain (d)
MBK106
12
mb
3
13
2
MBK116
mb
s
d
g
mbb076
Philips Semiconductors
PHP/PHB222NQ04LT
N-channel TrenchMOS™ logic level FET
Product data Rev. 01 — 13 May 2004 2 of 13
9397 750 13156
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
3. Ordering information
4. Limiting values
Table 2: Ordering information
Type number Package
Name Description Version
PHP222NQ04LT TO-220AB Plastic single-ended package; heatsink mounted; 1 mounting hole; 3 leads SOT78
PHB222NQ04LT D
2
-PAK Plastic single-ended surface mounted package; 3 leads (one lead cropped) SOT404
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
drain-source voltage (DC) 25 °C ≤ T
j
≤ 175 °C - 40 V
V
DGR
drain-gate voltage (DC) 25 °C ≤ T
j
≤ 175 °C; R
GS
=20kΩ -40V
V
GS
gate-source voltage (DC) - ±15 V
I
D
drain current (DC) T
mb
=25°C; V
GS
=10V;Figure 2 and 3 -75A
T
mb
= 100 °C; V
GS
=10V;Figure 2 -75A
I
DM
peak drain current T
mb
=25°C; pulsed; t
p
≤ 10 µs; Figure 3 - 240 A
P
tot
total power dissipation T
mb
=25°C; Figure 1 - 300 W
T
stg
storage temperature −55 +175 °C
T
j
junction temperature −55 +175 °C
Source-drain diode
I
S
source (diode forward) current (DC) T
mb
=25°C - 75 A
I
SM
peak source (diode forward) current T
mb
=25°C; pulsed; t
p
≤ 10 µs - 240 A
Avalanche ruggedness
E
DS(AL)S
non-repetitive drain-source
avalanche energy
unclamped inductive load; I
D
=75A;
t
p
= 0.29 ms; V
DD
≤ 40 V; R
GS
=50Ω;
V
GS
= 10 V; starting T
j
=25°C
- 560 mJ
Philips Semiconductors
PHP/PHB222NQ04LT
N-channel TrenchMOS™ logic level FET
Product data Rev. 01 — 13 May 2004 3 of 13
9397 750 13156
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Fig 1. Normalized total power dissipation as a
function of mounting base temperature.
Fig 2. Normalized continuous drain current as a
function of mounting base temperature.
T
mb
=25°C; I
DM
is single pulse; V
GS
=10V
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
03aa16
0
40
80
120
0 50 100 150 200
T
mb
(
°
C)
P
der
(%)
03aq37
0
40
80
120
0 50 100 150 200
T
mb
(
°
C)
I
der
(%)
P
der
P
tot
P
tot 25 C
°
()
-----------------------
100%×= I
der
I
D
I
D25C
°
()
-------------------
100%×=
03aq30
1
10
10
2
10
3
1 10 10
2
V
DS
(V)
I
D
(A)
DC
100 ms
10 ms
Limit R
DSon
= V
DS
/ I
D
1 ms
t
p
= 10
µ
s
1 s
P1-P3P4-P6P7-P9P10-P12P13-P13

PHB222NQ04LT,118

Mfr. #:
Buy PHB222NQ04LT,118
Manufacturer:
NXP Semiconductors
Description:
MOSFET N-CH 40V 75A D2PAK
Lifecycle:
New from this manufacturer.
Delivery:
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