EV-ADUCRF101MK1Z

EV-ADuCRF101 Evaluation Board User Guide
Rev. 0 | Page 4 of 12
MINI BOARD FEATURES
POWER SUPPLY
Two options are available for powering the board.
Use the emulator board.
The 5 V USB supply on J3.7 is regulated via the linear
voltage regulator, U2. The 3.3 V regulator output powers
the red power LED, D2. When LK1 is in place, the regulator
output is connected back to the emulator board on J3.8.
The regulator powers the ADuCRF101 only when LK1 and
LK2 are in place on the mini board.
Apply an external power supply to IOVDD on J1.3.
To measure the ADuCRF101 current consumption only,
apply the supply directly to IOVDD. Remove LK1 and LK2,
and disconnect the emulator board.
It is also possible to power the device from an external
supply at 3.3 V while debugging with the emulator board.
Remove LK1 and insert LK2.
Each device supply pin of the ADuCRF101 is decoupled with
0.1 µF and 100 pF capacitors. A 68 µF capacitor is used on the
supply line for the transceiver.
POWER INDICATOR/GENERAL-PURPOSE LEDS
A power LED (D2) is used to indicate that the interface board
is providing the supply to the board. Note that LK1 and LK2
must be inserted for the ADuCRF101 to be powered from the
emulator board. A general-purpose LED (D1) is connected to
P4.2 of the ADuCRF101. When P4.2 is cleared, the LED is
turned on. When P4.2 is set, the LED is turned off.
CRYSTAL CIRCUITS
Footprints for a through-hole 32.768 kHz watch crystal (Y2)
and its two capacitors are included on the board. This crystal can
be selected by software as the clock source of the wake-up timer.
EMULATOR INTERFACE
Nonintrusive emulation and download are possible on the
ADuCRF101 via serial wire by connecting the emulator board
to the J3 connector. Only two signals are required for debug
purposes: SWDIO and SWCLK. The reset signal is also connected
and can be used to provide a reset from the PC, if required.
Other emulators supporting serial wire debug (for example, JLINK
Version 6 and higher) can be used. The connections between
the mini board and the 20-pin JTAG connector are listed in
Table 3.
Table 3. Mini Board/Emulator Connections
Signal
J3 Connector
(Mini Board)
20-Pin JTAG Connector (Emulator)
GND J3.2 Pin 4, Pin 6, Pin 8, Pin 10, Pin 12,
Pin 14, Pin 16, Pin 18, Pin 20
VDD J3.8 Pin 1 and Pin 2
SWDIO J3.3 Pin 7
SWCLK J3.5 Pin 9
RESET J3.1 Pin 15
Note that the internal pull-ups on SWDIO and SWCLK are
sufficient, and no external resistors are required.
RESET/DOWNLOAD PUSH BUTTONS
A reset push button is available to allow the user to reset the part
manually. When pressed, the reset pin of the ADuCRF101 is pulled
to ground. Because the
RESET
pin on the ADuCRF101 is Schmidt-
triggered internally, there is no need to use an external Schmidt
trigger on this pin. A second push button, BOOT, is connected to
P0.6/IRQ2 and facilitates serial download mode entry.
RS-232 INTERFACE
To interface the ADuCRF101 UART pins to a PC, the USB UART
interface on the emulator board is the first option to consider.
The ADuCRF101 P1.0 and P1.1 lines are available on the top
row of the J3 connector and can be directly connected to EVA L-
ADUC-CABLE1Z, as shown in Fi
gure 4, or similar adaptor that
inclu
des an RS-232 interface device providing the required level
shifting or a USB UART interface. Supply should be provided
on J1.3 (IOVDD) and LK2 inserted when using an RS-232
interface.
To communicate via UART using a UART cable, EVA L -ADUC-
CABLE1Z, the supply should be between 3 V and 3.6 V because
the ca
ble is operational only in this supply range. The EVA L -
ADUC-CABLE1Z is available for purchase on the Ana
log
Devi
ces, Inc. web site.
Figure 4. Mini Board Connected to EVAL-ADUC-CABLE1Z
11040-004
Evaluation Board User Guide EV-ADuCRF101
Rev. 0 | Page 5 of 12
RF MATCHING NETWORK
An RF matching network is available to match the LNA input
impedance and PA output with the 50 Ω SMA connector (J4)
for ADuCRF101 at different frequencies depending on the
board used.
Different boards are available based on the RF transceiver
frequency required. See Table 4 for the relevant model numbers.
Table 4. ADuCRF101 Development Systems Optimized
Communication Frequency
Frequency Topology Models
868 MHz/915 MHz Differential PA EV-ADuCRF101MK1Z
EV-ADuCRF101QS1Z
EV-ADuCRF101QSP1Z
433 MHz Differential and
single-ended PA
EV-ADuCRF101MK3Z
EV-ADuCRF101QS3Z
EV-ADuCRF101QSP3Z
The list of components for the different models available is
available in Table 8 to Table 12.
The 868 MHz/915 MHz models come with a matching network
for differential PA only. The matching network components can
be modified to evaluate the single-ended PA. The list of compo-
nents for single-ended PA operating at 868 MHz/915 MHz is
available in Table 13.
The 433 MHz models come preloaded with a combined matching
network for both differential and single ended PA operation.
SENSITIVITY MEASUREMENTS
To perform the BER test on the RF transceiver, the internal
clock and data signals of the transceiver can be brought to the
ADuCRF101 GPIO pins
The CLOCK signal can be brought out to P0.6.
The DATA signal can be brought out to P2.6.
EV-ADuCRF101 Evaluation Board User Guide
Rev. 0 | Page 6 of 12
MINI BOARD CONNECTORS
EDGE CONNECTORS J1 AND J2
ADuCRF101 signals, such as GPIOs and analog inputs are
available on the edge of the board, on two unpopulated
through-hole connectors. These two connectors can be used
to plug the mini board into a prototype board.
The pinout of the two edge connectors is shown in Table 5 and
in Table 6.
Table 5. Pin Functions for Edge Connector J1
Pin Number Pin Function
J1-1 5VOUT
J1-2 VDDOUT
J1-3 IOVDD
J1-4 GND
J1-5 RESET
J1-6 NC
J1-7 P1.5
J1-8 P1.4
J1-9 P1.3
J1-10 P1.2
J1-11
P1.1
J1-12 P1.0
J1-13 P4.0
J1-14 P4.1
J1-15 P4.2
J1-16 P4.3
J1-17 P4.4
J1-18 P4.5
J1-19 P4.6
J1-20 P4.7
J1-21 P3.2
J1-22 P3.3
J1-23 P3.4
J1-24 P3.5
Table 6. Pin Functions for Edge Connector J2
Pin No. Pin Function
J2-1 ADC0
J2-2
ADC1
J2-3 ADC2
J2-4 ADC3
J2-5 ADC4
J2-6 ADC5
J2-7 VREF
J2-8 LVDD1
J2-9 GND
J2-10 P0.7
J2-11 P0.6
J2-12 P0.5
J2-13 P0.4
J2-14 P0.3
J2-15 P0.2
J2-16 P0.1
J2-17 P0.0
J2-18 P2.6
J2-19
P2.4
EMULATION AND SERIAL INTERFACE CONNECTOR J3
Connector J3 provides a connection with the emulation board.
The pinout for the J3 connector is described in Table 7.
Table 7. Pin Functions for Edge Connector J3
Pin No. Pin Function
J3-1
RESET
J3-2 GND
J3-3 SWDIO
J3-4 TX
J3-5 SWCLK
J3-6 RX
J3-7 5VUSB
J3-8 VDDOUT

EV-ADUCRF101MK1Z

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
ADUCRF101 Microcontroller Evaluation Board 0.032768MHz CPU
Lifecycle:
New from this manufacturer.
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