C8051T63x-DK
Rev. 0.1 7
6. Example Source Code
Example source code and register definition files are provided by default in the SiLabs\MCU\Examples\C8051T63x
directory during IDE installation. These files may be used as a template for code development.
6.1. Register Definition Files
Register definition files C8051T630.inc, C8051T630_defs.h, and compiler_defs.h, define all SFR registers and bit
addressable control/status bits. They are installed by default into the SiLabs\MCU\Examples\C8051T63x directory
during IDE installation. The register and bit names are identical to those used in the C8051T63x data sheet. The
register definition files are also installed in the default search path used by the Keil Software 8051 tools. Therefore,
when using the Keil 8051 tools included with the development kit (A51, C51), it is not necessary to copy a register
definition file to each project's file directory.
6.2. Blinking LED Example
The example source files T63x_Blinky.asm and T63x_Blinky.c show examples of several basic C8051T63x
functions. These include disabling the watchdog timer (WDT), configuring the Port I/O crossbar, configuring a timer
for an interrupt routine, initializing the system clock, and configuring a GPIO port. When compiled/assembled and
linked, these programs flash the green LED on the C8051T630 Motherboard about ten times a second using the
interrupt handler with a timer.
7. Development Boards
The C8051T63x Development Kit includes a motherboard that interfaces to various daughter boards. The
C8051T630 Emulation Daughter Board contains a C8051F336 device to be used for preliminary software
development. The C8051T630 Socket Daughter Board allows programming and evaluation of the actual
C8051T63x family of devices. Numerous input/output (I/O) connections are provided on the motherboard to
facilitate prototyping. Figure 3 shows the C8051T630 Motherboard and indicates locations for various I/O
connectors. Figure 4 shows the factory default shorting block positions. Figures 5 and 6 show the available
C8051T630 daughter boards.
P1, P2 Daughter board connection
P3 Power connector that accepts input from 7.5 V dc to 15 V dc unregulated power adapter
P4 USB connector for UART to USB communications interface
P5 USB Debug interface connector
J1 Analog I/O terminal block
J2 Port 0 header
J3 Port 1 header
J4 Port 2 header
J5 Connects P0.1 (IDAC) pin to grounded resistor to produce voltage output at IDAC pin.
J6 Power supply selection header (See “7.3. Power Supply Headers (J6 and J7)”)
J7 Power supply enable header that connects power source selected on J6 to the board's main
power supply net
J8 Communications interface control signal header
J9 Connects port pin P0.7 to the switch labeled "SW" and port pin P1.3 to the LED labeled "LED"
J10 Communications interface data signal header
J11 VPP supply connection used when programming EPROM devices
J12 Connects potentiometer to the port pin, P1.6
J13 Additional connections to ground
