72004 Semtech Corp. www.semtech.com
SC338(A)
POWER MANAGEMENT
Applications Infomation (Cont.)
SC338(A) Supply Comes Up Before MOSFET Drain Supply
MOSFET Drain Supply Comes Up Before SC338(A) Supply
Figure 1: Power Supply Sequencing
supplied to the MOSFET drain should be greater than
the output undervoltage threshold when that
output is enabled. This assumes that the drop through
the pass MOSFET is negligible. If not, then this drop needs
to be taken into account also since:
V
OUT
= V
DRAIN
- (I
OUT
x R
DS(ON)
).
If the supply to the SC338(A) IN pin comes up before the
supply to the MOSFET drain, then that output should be
enabled as the supply to the MOSFET drain is applied
- the Power Good signal for this rail would be ideal. If the
power supply to the MOSFET drain comes up before the
power supply to the SC338(A) IN pin, then the output
can either be enabled with the supply to the IN pin or
afterwards. Please see the example below.
Example: SC338(A) powered from 5V, output 1 powered
from 1.8V set for 1.5V out, output 2 not shown for
simplicity. Worst case undervoltage threshold is 60% (over
temperature) of 1.5V, or 0.9V. The typical enable
threshold is ~1V. See Figure 1 below.
Component Selection
Output Capacitors: low ESR capacitors such as Sanyo
POSCAPs or Panasonic SP-caps are recommended for
bulk capacitance, with ceramic bypass capacitors for
decoupling high frequency transients.
Input Capacitors: placement of low ESR capacitors such
as Sanyo POSCAPs or Panasonic SP-caps at the input to
the MOSFET (V
DRAIN
) will help to hold up the power supply
during fast load changes, thus improving overall transient
response. If V
DRAIN
is located at the bulk capacitors for
the upstream voltage regulator, additional capacitance
82004 Semtech Corp. www.semtech.com
SC338(A)
PRELIMINARYPOWER MANAGEMENT
may not be required. In this case a 0.1µF ceramic
capacitor will suffice. The input supply to the SC338(A)
should be bypassed with a 0.1µF ceramic capacitor.
MOSFETs: very low or low threshold N-channel MOSFETs
are required. Selecting FETs rated for V
GS
of 2.7V or 4.5V
will depend upon the available drive voltage (6.9V from
12V in or 4.85V from 5V in), the output voltage and
output current. For the device to work under all
operating conditions, a maximum R
DS(ON)
must be met to
ensure that the output will never go into dropout:
=
)MAX(OUT
)MAX(OUT)MIN(IN
)MAX)(ON(DS
I
VV
R
Note that R
DS(ON)
must be met at all temperatures and at
the minimum V
GS
condition.
Setting The Output Voltage: the adjust pins connect
directly to the inverting input of the error amplifiers, and
the output voltage is set using external resistors (please
refer to the Typical Application Circuit on page 1).
Using output 1 as an example, the output voltage can
be calculated as follows:
+=
2R
1R
15.0V
OUT
The input bias current for the adjust pin is so low that it
can be safely ignored. To avoid picking up noise, it is
recommended that the total resistance of the feedback
chain be less than 100k.
Please see Table 1 on this page for recommended
resistor values for some standard output voltages. All
resistors are 1%, 1/10W.
The maximum output voltage that can be obtained from
each output is determined by the input supply voltage
and the R
DS(ON)
and gate threshold voltage of the
external MOSFET. Assuming that the MOSFET gate
threshold voltage is sufficiently low for the output
voltage chosen and the worst-case drive voltage, V
OUT(MAX)
is given by:
)MAX)(ON(DS)MAX(OUT)MIN(DRAIN)MAX(OUT
RIVV =
Applications Infomation (Cont.)
)V(TUOVk(3Rro1R
)k(4Rro2R
)
50.10.110.01
2.10.410.01
5.10.020.01
5.23.543.11
3.34.363.11
Table 1: Recommended Resistor Values For SC338(A)
Design Example
Goal: 1.05V±5% @ up to 2.5A from 1.2V±5% and 5V±5%
Solution 1: no passive droop.
Total window for DC error, ripple and transient is ±52.5mV
Since this device is linear, and assuming that it has been
designed to not ever enter dropout, we do not have ripple
on the output.
The DC error for this output is the sum of:
V
REF
accuracy = ±2.5% = ±26.3mV
Feedback chain tolerance = ±1% = ±10.5mV
Load regulation = ±0.25% = ±2.6mV
Set resistors per Table 1 should be 11.0k (top) and
10.0k (bottom).
Total DC error = ±3.75% = 39.4mV
This leaves ±1.25% = 13.1mV for the load transient ESR
spike, therefore:
== m2.5
A5.2
mV1.13
R
)MAX(ESR
Bulk capacitance required is given by:
F
dV
tdI
C
)MIN(BULK
µ
=
Where dI is the maximum load current step, t is the
maximum regulator response time and dV is the
92004 Semtech Corp. www.semtech.com
SC338(A)
POWER MANAGEMENT
allowable voltage droop. Therefore with dI = 2.5A,
t = 1µs, and dV = 13.1mV:
F191
101.13
1015.2
C
3
6
)MIN(BULK
µ=
=
So if we use 1% V
OUT
set resistors we would select 2 x
>100µF, 12m POSCAPs for output capacitance (which
assumes that local ceramic bypass capacitors will
absorb the balance of the (6 - 5.3)m ESR
requirement - otherwise 10m capacitors should be
used).
If we use 0.1% set resistors, then the total DC error
becomes ±2.85% = ±29.9mV, leaving ±2.15% = 22.6mV
for the ESR spike. In this case:
== m0.9
A5.2
mV6.22
R
)MAX(ESR
and
F111
106.22
1015.2
C
3
6
)MIN(BULK
µ=
=
So for 0.1% resistors we could use 2 x 100µF, 18m
POSCAPs for output capacitance, or 1 x >100µF, 10m
POSCAP.
Obviously this is a very severe example, since the output
voltage is so low and therefore the allowable window is
very small. See solution 2 below for an alternate
solution. For higher output voltages the components
required will be less stringent.
The input capacitance needs to be large enough to stop
the input supply from collapsing below -5% (i.e. the
design minimum) during output load steps. If the input to
the pass MOSFET is not local to the supply bulk
capacitance then additional bulk capacitance may be
required.
MOSFET selection: since the input voltage to the
SC338(A) is 5V±5%, the minimum available gate drive
is:
V3.3)1025.14.4(V
GS
==
So a MOSFET rated for V
GS
= 2.7V will be required, with
an R
DS(ON)(MAX)
(over temp.) given by:
=
=
=
m36
5.2
)05.114.1(
I
)VV(
R
)MAX(OUT
OUT)MIN(IN
)MAX)ON(DS
Obviously, if a 12V rail is available to power the SC338(A),
the number of FET options increases dramatically.
Applications Infomation (Cont.)
Solution 2: using passive droop.
or similar
1.075V
1.2V +/-5% IN
1.05V @ 2.5A
C1
0.1uF
R1
11.0k
C3
100uF, 25mOhm POSCAP
U1
SC338(A)
1
2
3
4
5
6
7
8
9
10
DRV1
ADJ1
EN1
PGD1
GND PGD2
EN2
ADJ2
DRV2
IN
R2
10.0k
RDROOP
20mOhm
Q1
IRF7311
4
1
2
3
5
6
78
Passive droop allows us to use almost the full output
tolerance window for transients, hence making the
output capacitor selection simpler and (hopefully)
cheaper. The trade-offs are the cost of the droop
resistor versus the reduction in output capacitor cost,
and the reduction in headroom which impacts MOSFET
selection. The top of the feedback chain connects to the
“input” side of R
DROOP
, and the output is set for 1.075V.
Thus at no load, V
OUT
will be 1.075V (or 1.05V + 2.4%)
and at I
OUT
= 2.5A, V
OUT
will be 1.025V (or 1.05V - 2.4%).
If 1% set resistors are used, the total DC error will be
±3.75% = 39mV. Thus at no load, the minimum output
voltage will be given by:
V036.1039.0075.1V
)LOAD_NO_MIN(OUT
==
This leaves 38.5mV for transient response, giving:
==
m4.15
A5.2
mV5.38
R
)MAX(ESR
and
F65
105.38
1015.2
C
3
6
)MIN(BULK
µ=
=
Instead of 2 x 100µF, 12m capacitors, we can use 1 x
100µF, 15m capacitor.
Layout Guidelines
The advantages of using the SC338(A) to drive external
MOSFETs are a) that the bandgap reference and control
circuitry are in a die that does not contain high power
dissipating devices and b) that the device itself does not

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